Review and Comment

Practical exploration of quantum computational chemistry simulation in the field of batteries

DOI:10.16157/j.issn.0258-7998.245719

Author:Zhao Tongge1,Chen Yue1,Yu Chunlin1,2,Lu Yuhu3,Lv Qiwen1,Wu Jiajie1,Cao Xi1,Zhou Peng1, Zhang Lufeng1,Zheng Ping1,Shi Jinjing3

Author Affilications:1.China Great Wall Technology Group Co., Ltd., China Great Wall Research Institute; 2.China Electronics Corporation, Science and Technology Development Department; 3.School of Electronic Information, Central South University

Abstract:Quantum computing technology offers acceleration potential for solving practical issues in the field of new energy, particularly in the simulation of complex battery materials. Concurrently, the rapid growth of emerging industries such as renewable energy and electric transportation has intensified the need for efficient and precise calculations of battery material properties, which encounter difficulties for using traditional computing methods to solve these problems. Quantum computing provides novel insights for tackling these challenges. Initiating with the foundational computational principles,this paper delineates the commonly utilized quantum algorithms for simulating the chemical properties of battery materials. Additionally, a range of innovative software tools used in quantum simulations are thoroughly introduced, and application cases from various automotive companies are analyzed to elucidate the practical applications of quantum chemistry simulations in the field of batteries. Our work provides new insights and methodologies for battery material simulations, ground-state energy calculations, and performance optimization, with the potential to contribute to the optimized development of new energy battery materials.
Key word:
quantum computing
quantum chemistry simulations
battery performance analysis
variational quantum eigensolver
quantum phase estimation

Review of digital rail transit system DRT

DOI:10.16157/j.issn.0258-7998.245643

Author:Kan Weifeng1,Sun Shengnan2,Wang Yongming2,Yang Jinxin3,Qi Zhongan1, Huang Dong4,Zhang Yi4,Lv Bo2

Author Affilications:1.SUNWIN;2.Tianhua College, Shanghai Normal University; 3.Shanghai Electric Gotion New Energy Technology Company Limited; 4.Shanghai Electric Group Intelligent Transportation Technology Company Limited

Abstract:This paper briefly reviews the research and application status of Digital Rail Transit (DRT) system as an electronic guided rubber wheel system in the field of urban rail transit, and analyzes the technical research and development of i-DRT system of Shanghai Electric Group Intelligent Transportation Technology Co., Ltd. This paper also introduces the application of cooperation with SUNWIN in existing bus models, evaluates the technical principle, technical advantages and challenges of the current DRT system, and puts forward future research directions and suggestions, in order to provide reference for subsequent research.
Key word:
digital rail transit (DRT) system
urban rail transit
magnetic nail positioning
vehicle tracking guidance

Artificial Intelligence

An improved YOLOv8n algorithm for dense pedestrian scenarios

DOI:10.16157/j.issn.0258-7998.245589

Author:Wang Lili1,2,Fan Panpan1,Zhang Shiyu1

Author Affilications:1.School of Automation and Information Engineering, Xi’an University of Technology; 2.Key Laboratory of Wireless Optical Communication and Network Research

Abstract:To address the issues of insufficient recognition accuracy and inaccurate detection of traditional algorithms in dense pedestrian scenarios, an improved dense pedestrian detection model based on YOLOv8n is proposed. Firstly, by introducing the SPPELAN module to replace the SPPF module in the backbone network, the model’s ability to perceive features of multi-scale targets is enhanced. Secondly, a residual attention mechanism is devised to improve the model’s ability to capture subtle features, thereby enhancing detection accuracy. Finally, by adding DySample operator and improving the small object detection layer, the model’s ability to locate and recognize small-scale objects is enhanced. Experimental results show that the improved model, compared to YOLOv8n, increases recall rate, mAP50, and mAP50-95 by 2.5%, 2.9%, and 2.4%, respectively, on the CrowdHuman dataset, and performs excellently on the WiderPerson and CityPersons datasets. The results of the experiments show that this algorithm is more effective for dense pedestrian detection tasks.
Key word:
YOLOv8n
dense pedestrian detection
SPPELAN module
residual attention mechanism
DySample
small object detection layer

Research on the application of deep learning based video recognition for power plant leakage and dripping

DOI:10.16157/j.issn.0258-7998.245845

Author:Zhang Yuan1,Si Yuan2

Author Affilications:1.CHN Energy I&C Interconnection Technology Co., Ltd.; 2.China Electronics Corporation Limited

Abstract:To solve the problem of “leakage and dripping” during the operation of thermal power plant equipment, a video recognition model for power plant leakage based on convolutional neural network model is proposed through the application of visual recognition technology and deep learning, and the model is optimized and improved. Cameras in thermal power plants are utilized to collect on-site images, then data preprocessing and optimization is performed, and corresponding datasets are established based on defect morphology. Then, by combining semantic segmentation, data augmentation, attention mechanisms, and changing activation functions with convolutional neural networks, the YOLOv5 algorithm is deeply optimized, including improvements in training strategies and model evaluation adjustments. This enhances the model algorithm’s ability to recognize and understand complex scenes, effectively improving video recognition accuracy and speed, and helping to improve the automation and intelligence level of thermal power plant inspections. It has good engineering application prospects.
Key word:
deep learning
power plant
leakage and dripping
video recognition

Integratedd Circuits and Its Applications

Reinforcement design method for 4H-SiC power devices targeting total dose effect

DOI:10.16157/j.issn.0258-7998.245686

Author:Wang Jinlong1,Sun Kai2

Author Affilications:1.College of Integrated Circuits, University of Chinese Academy of Sciences; 2.Institute of Microelectronics of the Chinese Academy of Sciences

Abstract:This article introduces the impact of total dose effect on 4H-SiC power devices and corresponding reinforcement schemes. Firstly, the electrical characteristics of 4H-SiC power devices and the radiation environment they face during operation were introduced. Then, based on the impact of radiation on device characteristics, radiation defects were identified and degradation mechanisms were established. Next, the irradiation characteristics of unipolar and bipolar devices were analyzed. Finally, reinforcement design methods were proposed from the aspects of process, device structure, layout, and circuit to address the degradation mechanism of devices in irradiation environments.
Key word:
4H-SiC
TID
circuit reinforcement

A low time mismatch sampling method for time-interleaved ADC

DOI:10.16157/j.issn.0258-7998.245758

Author:Yan Xiang,Qin Kefan,Yang Shangzheng,Hu Weibo

Author Affilications:College of Electronic Information and Optical Engineering, Nankai University

Abstract:To cope with the performance degradation caused by time mismatch in time-interleaved analog-to-digital converters, an efficient hierarchical series sampling method was proposed. The idea of this sampling method is to aggregate the clock sources related to sampling accuracy at the main sampling switch position, to alleviate the sampling accuracy degradation due to time mismatch in the control clock of multiple sub-sampling switches. In addition, a high-speed bootstrap sampling switch is also designed, which has the characteristics of fast opening speed and high linearity. The sampling method is based on the 22 nm CMOS process to build the circuit and carry out post-simulation verification. The post-layout simulation results show that the sampling method is not sensitive to time mismatch, and the signal noise distortion ratio (SNDR) of the sampling network reaches 72 dB at a supply voltage of 0.9 V and an input signal frequency of 2 GHz.
Key word:
time-interleaved ADC
mismatch error
bootstrap switch

Design and implementation of DSP on-chip Flash testing system

DOI:10.16157/j.issn.0258-7998.245650

Author:Wang Tao,Yu Peng,Qian Yunying

Author Affilications:The 58th Research Institute of China Electronics Technology Group Corporation

Abstract:In the reliability screening and assessment test of DSP chip, the on-chip Flash erasure durability and data retention test is one of the most important tests. In view of the limitations of built-in self-test and external automated machine testing, this paper proposes the design and implementation of a test system for on-chip Flash of DSP chip. Based on the analysis of Flash fault types and test algorithms, the hardware schematic diagram and software implementation process are given, and a physical platform is built for effect evaluation. The test results show that the system can realize the on-chip Flash automatic test of multi position DSP chip without manual participation. At the same time, the working status can be displayed in real time, and the data and results in the test process can be automatically saved in the external memory, which is convenient for the statistical analysis of the test results in the later stage.
Key word:
on-chip Flash
erasure durability
data retention
test system

Design of multistage configurable CIC filter

DOI:10.16157/j.issn.0258-7998.245640

Author:Li Shengmei1,Zhao Hai2,Ni Yi1

Author Affilications:1.College of IoT Engineering, Jiangnan University; 2.Jiangsu Jitri Intelligent Integrated Circuit Design Technology Research Institute Co., Ltd.

Abstract:In view of the development of Very-Large-Scale Integration circuits and the wide application of Sigma Delta analogue-to-digital converters, this paper proposes a multi-stage configurable cascade integrated comb filter structure for 24-bit Sigma Delta analogue-to-digital converters.The structure reduces the number of operation logic and storage logic units with the help of adjusting the number of cascades and time division multiplexing techniques for reusing a circuit, thus achieving a reduction in area.The CIC filter model is constructed by MATLAB Simulink for simulation, and the code design is completel. The simulation results show that the filter can realise 64~8 192 times of 8 kinds of downsampling adjustable and 2-stage or 3-stage cascade adjustable. ASIC layout is designed based on 180 nm COMS standard cell process libraries, and digital circuits offer significant area advantages over traditional CIC filters.
Key word:
CIC filter
downsampling factor adjustable
stages adjustable
time division multiplexing circuit

Measurement Control Technology

Development of a portable stable spectrum source detector

DOI:10.16157/j.issn.0258-7998.245651

Author:Chen Tong1,Chen Chao1,Li Weiqiang1,Zhang Xionghui1,Ye Chuantao1,Liu Xianming2

Author Affilications:1.Southwest Center of Material Equipment Company, China Petroleum Logging Company Limited;2.School of Mechanical Engineering, Yangtze University

Abstract:Domestic logging companies currently possess thousands of built-in sources. The national control over radioactive sources is extremely stringent, making the management of stable spectrum sources a critical aspect of safety management. During maintenance or transportation, the instruments may be lost or stolen. If these situations are not promptly detected, it may lead to accidental radiation exposure of personnel or the risk of uncontrolled radioactive sources. Existing radiation source detectors are unable to detect the internal stable spectrum source signals of the instruments due to the shielding of high-density metal casings and the small volume of selected crystals. To address this issue, this paper develops a portable energy spectrum source detector. The device employs a high-resolution, large-volume sodium iodide (NaI) crystal and a Photomultiplier Tube (PMT), and utilizes the unique peak sampling principle of this class of detectors, achieving rapid and accurate detection of the shielded nanocurie-level stable spectrum source. The developed stable spectrum source detector is not only easy to operate and highly efficient in detection but also effectively identifies the stable spectrum sources inside the instruments without the need to disassemble them or when the instruments are not in operation.
Key word:
scintillation crystal
photomultiplier tube
circuit design
peak sampling

GIS partial discharge fault diagnosis method based on SGMD-LSTM

DOI:10.16157/j.issn.0258-7998.245691

Author:Zhang Yun,Zhang Chao,Zhang Shiyong,Ma Pengchi,Yang Guang,Ding Hao

Author Affilications:Yancheng Power Supply Branch, State Grid Jiangsu Electric Power Co., Ltd.

Abstract:To accurately diagnose partial discharge faults in Gas Insulated Switchgear (GIS), a fault diagnosis method based on Symplectic Geometric Mode Decomposition (SGMD) and improved Long Short Term Memory (LSTM) is proposed. SGMD is introduced to decompose partial discharge signals. Multidimensional features are extracted from signals and a mixed time-frequency-entropy feature vector is constructed. The Osprey-Cauchy-Sparrow Search Algorithm (OCSSA) is used to adaptively optimize the number of hidden layer nodes and learning rate of LSTM. Finally, OCSSA-LSTM is used for partial discharge identification. The experimental results show that OCSSA has significant improvements in convergence accuracy and speed, and performs excellently. Compared with other fault diagnosis models, the accuracy of the OCSSA-LSTM fault diagnosis model can reach up to 97.5%, and it can also accurately identify actual GIS operation and maintenance data.
Key word:
GIS
SGMD
OCSSA
LSTM
partial discharge
fault diagnosis

Research on the simulation application of the TELEPERM XS system based on the RINSIM2.0 simulation platform

DOI:10.16157/j.issn.0258-7998.245819

Author:Wang Fei1,Ye Qian2,3,Ji Yanhong1,Wang Sibo1,Cui Weiwei2,Yu Lei1,Shan Fuchang2,3

Author Affilications:1.Jiangsu Nuclear Power Corporation;2.China Nuclear Power Operation Technology Corporation;3.CNNC Key Lab on Nuclear Industry Simulation

Abstract:This paper introduces the development and modification process of the VVER type full slope simulator based on the RINSIM2.0 simulation platform. Due to significant differences in operating system, compiler and other aspects between the original Linux platform and the domestic platform, in-depth development has been carried out for simulation models, Siemens TELEPERM XS(TXS) system, communication interfaces, core instrumentation and control systems, and instructor station, which have been integrated into the RINSIM2.0 simulation platform. This paper provides a detailed introduction to the development process of the TXS system based on the domestic platform. On this basis, transient tests and verification have been carried out, and the results show that the calculation results of the domestic RINSIM2.0 simulation platform are basically consistent with the original platform, which verifies the success of the domestication work and lays a solid foundation for the digital transformation and intensive management of China Nation Nuclear Power on VVER type full slope simulators.
Key word:
RINSIM2.0 simulation platform
TXS system
integrated application
comparison verification

Communication and Network

Research on hybird speech compression coding algorithm based on IP packet splitting and reassembling technology

DOI:10.16157/j.issn.0258-7998.245688

Author:Li Lingyun,Li Xiaoke,Chen Yizhao,Wang Guofa,Wang Hui

Author Affilications:The 34th Research Institute of CETC

Abstract:Aiming at the special communication network service system, in order to transmit 1 channel of standard G.729 Voice over Internet Protocol(VoIP)voice data over 10 kb/s narrowband channel in the special communication scenario, a hybrid speech compression coding algorithm based on IP packet splitting and reassembling technology is proposed. The algorithm decomposes the voice data after G.729 compression, and then performs secondary compression through Advanced Multi-Band Excitation (AMBE). Combined with IP packet splitting and reassembly technology, the payload in the voice data is retained, the redundant overhead data is eliminated, and the bandwidth required for voice data transmission is reduced. The effectiveness of the method is verified by simulation experiment. The experiments show that when the speech compression coding rate of G.729 and AMBE is 8 kb/s and 2.4 kb/s respectively, the load length is 20 ms, and the IP packet packaging cycle is 8 packets, the average sentence intelligibility is above 85% and the voice signal level is above level 3 under any optical path state, which meets voice transmission system requirements.
Key word:
speech compression coding
G.729
AMBE
IP packet splitting and reassembling
narrowband communication

The design and test of Ethernet with multiple SGMII based on FPGA

DOI:10.16157/j.issn.0258-7998.245853

Author:Fu Qiang,Qiao Hui,Yang Feihu,Cao Shuanzhu,Zhang Jingfei

Author Affilications:China Electronics Technology Group Corporation No.58 Research Institute

Abstract:Due to power consumption, size, and cost constraints, embedded processors typically integrate one or two Ethernet controllers, which cannot meet the demand for simultaneous transmission of multiple Ethernet data streams in certain specific field applications. This paper proposes an Ethernet design based on Field-Programmable Gate Array(FPGA), leveraging the high-speed and parallel processing advantages of FPGA, and the integrated Serializer/Deserializer(SerDes) resources to extend multiple Ethernet interfaces for simultaneous data transmission and reception. Communication with external PHY chips uses the Serial Gigabit Media Independent interface(SGMII), which can effectively reduce PCB size and wiring complexity. A multi-level testing method for the reliability of the underlying link transmission is proposed. Finally, through on-board debugging and verification, the 12 Ethernet interfaces achieve stable transmission at 1 000 Mb/s with no data errors.
Key word:
FPGA
SGMII
Ethernet
PHY

Computer Technology

A data matching algorithm based on instruction pipeline

DOI:10.16157/j.issn.0258-7998.245345

Author:Yang Jiajia,Li Zheng,Zheng Er,Zhao Jing,Yan Wei,Liu Jin

Author Affilications:The Sixth Research Institute of China Electronics Corporation

Abstract:The data matching technology based on regular expressions has significant application value in basic data governance and cleaning. However, in the data processing process of high-performance computing, the low performance of algorithm matching cannot meet the high-performance requirements of algorithms in the big data processing environment, resulting in limited application scope. To address this issue, a high-performance data matching algorithm based on instruction pipelining is proposed, known as γFA. It utilizes the vector instruction pipelining built into the Intel architecture to read in multiple character segments, performs pipeline ratio processing of the character segments with untrusted character sets through a wide-width vector comparison function, and converts them into integer vectors. The position location function is then used to accumulate and locate the first untrusted character position in the integer vector, calculate the number of characters that can be skipped, and reduce the significant time overhead caused by the regular expression matching engine accessing slow memory when processing untrusted character sets. This achieves performance acceleration for the regular expression matching algorithm. Experimental results show that the γFA algorithm achieves a throughput rate that is 15.88 to 53.06 times higher than the original DFA algorithm. Compared to the ßFA algorithm, the throughput rate is improved by 35.12% to 63.26%, achieving a better performance acceleration effect. Furthermore, after optimizing the γFA algorithm, a performance close to 100 Gb/s can be achieved, which is 15.88 to 64.94 times better than the performance of the original DFA matching algorithm. This represents an improvement of 2.15% to 43.09% compared to the γFA algorithm.
Key word:
regular expression matching
instruction pipeline
high-performance data matching

Research and implementation of a full-process academic early warning and tracking evaluation system

DOI:10.16157/j.issn.0258-7998.245298

Author:Li Qipeng1,Zeng Songwei2

Author Affilications:1.College of Mathematics and Computer Science, Zhejiang A&F University; 2.College of Optical, Mechanical and Electrical Engineering

Abstract:Traditional academic warning systems usually focus more on terminal indicators such as students’ grades and attendance, and trigger warnings when these indicators meet specific conditions. The academic warning system studied in this paper adopts a whole-process monitoring and warning method, which not only monitors conventional indicators such as students’ final grades, annual assessments, and attendance, but also comprehensively tracks, analyzes and evaluates students’ classroom performance, homework after class, team assessments, ideological and political assessments, and economic pressure, etc. Meanwhile, based on the implementation rules of the undergraduate tutor system, all tutors are encouraged to actively participate in academic warning activities. As important mentors in the learning process of students, they track and evaluate students’ academic performance, and provide timely, effective, and precise academic guidance, realizing the whole-process and closed-loop monitoring from issuing warnings to guiding effects. This paper uses Particle Swarm Optimization (PSO) to optimize Support Vector Machine (SVM), and combines Web and mini-program technology to implement a whole-process academic warning tracking and evaluation system, which effectively improves the accuracy and timeliness of warnings, filling in the gaps of traditional academic warning systems. This system is of great significance for improving the quality of students’ academic performance, and also provides a reference for academic warning support systems in other universities.
Key word:
academic early warning
dual mentorship
whole process
mutual assistance and mutual supervision
multidimensional data-drive

Design and application of new paperless conference system based on desktop cloud

DOI:10.16157/j.issn.0258-7998.244985

Author:Jin Shuyun1,Wei Jianfang1,Fang Zhiqi1,Min Xiaoshuang1,Li Shuairong1,Wu Jun2

Author Affilications:1.The Sixth Research Institute of China Electronics Corporation; 2.63661 Unit, People’s Liberation Army of China

Abstract:The paperless conference system based on desktop cloud present in this paper is a new type of paperless meeting system, which is efficient, optimized, easy-to-manage and easy-to-expand. It solves the problems that the conventional paperless conference system cannot create a conference remotely, multiple conference systems can only be managed independently, and the system cannot be used normally when the server is down. It improves the efficiency of the conference maintenance personnel.
Key word:
desktop cloud
paperless
conference system
efficient optimization

Circuits and Systems

Design of high frequency LLC resonant circuit based on double loop control

DOI:10.16157/j.issn.0258-7998.245644

Author:Liu Aohui,Wang Shaoning,Xu Tinghao

Author Affilications:Lanzhou Institute of Physics

Abstract:This paper investigated the use of a high frequency LLC resonant circuit with double loop control in an electric propulsion system's secondary power source. A detailed presentation and discussion of the LLC resonant converter topology design process were given. In order to minimize switching loss when operating at high frequencies, the power switching tube's primary side used soft switching technology and its secondary side used synchronous rectification technology. This paper presented a thorough analysis of the LLC resonant converter structure, utilizing Pulse Frequency Modulation (PFM) in place of standard Pulse Width Modulation (PWM). Simultaneously, a double loop voltage-current control technique was developed that could function at constant voltage throughout the load and voltage change range. Ultimately, the simulation results demonstrate that the controller performs well and the suggested circuit converter can achieve a constant voltage across a wide range of input voltages and load steps.
Key word:
LLC resonant transform
synchronous rectification
small signal analysis
two-loop control

Design and implementation of CMUT multi-channel ultrasonic transceiver board based on PXIe

DOI:10.16157/j.issn.0258-7998.245866

Author:Wu Shuaiqi,He Changde,Sun Shuaiwen,Lu Xiaoxing,Zhang Guojun,Zhang Wendong

Author Affilications:State Key Laboratory of Dynamic Measurement Technology, North University of China

Abstract:To enable multi-channel pulse transmission, data acquisition, storage, transmission, and analysis based on a capacitive micromachined ultrasonic transducer (CMUT) array, a 32-channel ultrasound transceiver board was designed based on the PXIe bus. This board utilizes a field-programmable gate array (FPGA) as the main controller and supports both transmission and reception modes. The modes are switched via a T/R switch. In transmission mode, the board drives the CMUT array to emit ultrasonic signals. In reception mode, it receives the analog echo signals from the CMUT, converts them into 14-bit digital signals via an ADC, frames and packages the data, buffers it through DDR3 memory, and transmits it to a PC via the PXIe interface. The paper elaborates on the system’s hardware circuits and FPGA logic design and verifies the design by driving a CMUT linear array to test an acrylic board. The test results demonstrate that the board meets the requirements of the CMUT array, and the system can be expanded to support more channels. This board provides hardware support for high-resolution ultrasound imaging and non-destructive testing applications.
Key word:
FPGA
PXIe
CMUT
multi-channel
data acquisition
ultrasound imaging system

Design of Hall power supply based on full bridge half bridge switching digital LLC resonant converter

DOI:10.16157/j.issn.0258-7998.245587

Author:Xu Tinghao,Wang Shaoning,Liu Aohui

Author Affilications:Lanzhou Institute of Space Technology Physics

Abstract:A power processing unit suitable for Hall electric propulsion systems is designed to meet the high input voltage requirements of space missions such as deep space exploration. The LLC resonant converter is studied for half bridge full bridge dynamic topology switching and soft start, achieving high efficiency and wide range output. By establishing a fundamental model of LLC resonant converter, analyzing the characteristic curves of frequency and gain, selecting the values of K and Q, variable frequency control output voltage is achieved, and a low peak full bridge half bridge switching mode based on simultaneous frequency conversion and variable duty cycle is designed. At the same time, in order to meet the soft start function required for electric propulsion, a segmented linear soft start mode based on changing the phase shift angle of LLC resonant converter MOSFET is designed according to the phase-shifting full bridge soft start. In order to verify the design performance, a 5 kW all digital prototype was designed, with an input of 400 V and an output of 200 V to 1 000 V. The results showed that it can achieve a wide range and high efficiency output of the LLC resonant converter.
Key word:
power processing unit
LLC resonant converter
full bridge half bridge switching
digital control
soft start

High Speed Wired Communication Chip

High Performance Computering

Information Flow and Energy Flow in Industrial Digital Transformation

Special Antenna and Radio Frequency Front End

Radar Target Tracking Technology

Key Technologies of 5G-A and 6G

Key Technologies of 5G and Its Evolution

Key Technologies of 5G and Its Evolution

Processing and Application of Marine Target Characteristic Data

Smart Power

Antenna Technology and Its Applications

5G-Advanced and 6G

Smart Agriculture

5G Vertical Industry Application

Microelectronics in Medical and Healthcare

Key Technologies for 6G

Application of Edge Computing in IIoT

Deep Learning and Image Recognization

6G Microwave Millimeter-wave Technology

Radar Processing Technology and Evaluation

Space-Ground Integrated Technology

Industrial Ethernet Network

5G Vertical Industry Application

Innovation and Application of PKS System

FPGA and Artificial Intelligence

5G Network Construction and Optimization

RF and Microwave

Edge Computing

Network and Business Requirements for 6G

5G and Intelligent Transportation

5G R16 Core Network Evolution Technology

Satellite Nevigation Technology

5G R16 Evolution Technology

5G Wireless Network Evolution Technology

5G Network Planning Technology

5G Indoor Coverage Technology

5G MEC and Its Applications

5G Co-construction and Sharing Technology

Expert Forum

5G and Emergency Communication

5G Slicing Technology and Its Applications

Industrial Internet

5G Terminal Key Realization Technology

5G and Artificial Intelligence

5G and Internet of Vehicles

Terahertz Technology and Its Application

Signal and Information Processing

Artificial Intelligence

5G Communication

Internet of Things and the Industrial Big Data

Electronic Techniques of UAV System

Power Electronic Technology

Medical Electronics

Aerospace Electronic Technology

Robot and Industrial Automation

ADAS Technique and Its Implementation

Heterogeneous Computing

2016 IEEE International Conference on Integrated Circuits and Microsystems

ARINC859 Bus Technology

FC Network Technology

Measurement and Control Technology of Bus Network

GJB288A Bus

Key Techniques of 5G and Algorthm Implement

IEEE-1394 Bus

Signal Conditioning Technology of Sensors

AFDX Network Technology

Discrete Signal Processing

Energy-Efficient Computing

Motor control

2012 Altera Electronic Design Article Contest