Abstract：In order to meet the requirements of complex electromagnetic environment testing and receiver's ultra-wideband, large instantaneous bandwidth, miniaturization and adjustability, this paper designs a receiver RF front-end module with 1.5 GHz~18 GHz ultra-wideband RF signal reception, 1 GHz large instantaneous bandwidth, large dynamic range and ultra-low receiving sensitivity, and it also has the function of outputting intermediate frequency and bandwidth. Through the test, the module is verified and the results meet the design requirements.

Abstract：This paper presents the design of a high-gain substrate integrated waveguide (SIW) circularly polarized antenna operating in the Ka-band, utilizing a quadruple-ridged waveguide as the circular polarization radiator. To validate the design, a 4×4 circularly polarized array antenna was developed, featuring a three-layer dielectric substrate structure: the top layer consists of a 4×4 quadruple-ridged waveguide circular polarization radiator, the middle layer comprises a 4×4 cavity-backed slot antenna array operating in the TE110 mode, and the bottom layer incorporates a T-shaped SIW-based one-to-eight power divider. Measurement results demonstrate that the array antenna achieves an S11<-10 dB bandwidth from 35.3 GHz to 35.55 GHz, a 3 dB axial ratio bandwidth from 35.24 GHz to 35.57 GHz, and a peak gain of 18.14 dBi at 35.42 GHz. The proposed design innovatively employs a quadruple-ridged waveguide to achieve circular polarization, offering high aperture efficiency and a compact structure, making it suitable for microwave and millimeter-wave systems.

Abstract：This paper introduces an engineering realization of a Ku-band miniaturized airtight power amplifier. Using 4 GaN power chips and 1 GaAs driver chips, the power is synthesized by combining a microstrip ring power divider/combiner with waveguide power divider/combiner/ synthesizer network. The continuous wave saturated output power at 13~15 GHz is greater than 120 W. the power amplifier uses a forced air cooling solution with a finned heat sink, which improves the heat sink’s heat dissipation efficiency and provides good heat dissipation performance. The technical condition of the power amplifier is stable, its reliability and practicality meet the requirements for engineering use, and it is suitable for microwave transmission systems in field such as telemetry, communication, and electronic warfare.

Abstract：To meet the needs of up converters for low insertion loss and high suppression filters, an H-plane iris band-pass filter at V-band was designed and fabricated. This filter was composed of six rectangular resonant cavities, which were connected together by series. The initial size values of six resonant cavities and seven coupling windows were obtained through theoretical calculations. The filter structure was modeled and optimized using three-dimensional electromagnetic simulation software HFSS. The sample filter was fabricated and measured. The measured results show that the insertion loss is less than 0.6 dB, the return loss is better than 15.6 dB between 47.2 GHz and 50.2 GHz. The stop-band suppression is 73.8 dBc at 42.6 GHz and 52.8 dBc at 54.8 GHz. The measured results are consistent with the simulation results.

Abstract：In LED display driver chips, the function of adjustable display refresh rate is realized by using adjustable SPWM algorithm. To solve the problem of large area resources and high cost when implementing traditional SPWM algorithm, an area optimization method based on SPWM algorithm is presented. This method divides sub-periods into two types. Length of every period is 2N, which simplifies computing resources required for implementing adjustable SPWM algorithm. Thus area of the drier chip is effectively reduced. Both traditional method and optimized method are compiled by Synopsys DC. The result shows that the optimization method can save 33.6% of the area compared with the tractional method.

Abstract：To meet the demand for high real-time performance and low latency in industrial automation and automotive fields, deterministic networking technologies centered around Time-Sensitive Networking (TSN) have rapidly developed in recent years. The IEEE 802.1 TSN working group proposed the IEEE 802.1Qcc protocol, which enables centralized management and dynamic distribution of TSN configurations through Centralized Network Configuration (CNC). In this context, this paper investigates a TSN remote configuration management solution based on NETCONF and YANG, and validates its feasibility in delivering configuration parameters from CNC to TSN switches. The research findings provide a technical foundation for the implementation of the Qcc protocol in TSN switches, further advancing the practical application of TSN technology in industrial and vehicular network scenarios.

Abstract：With the rapid development of spacecraft and the increasingly complex working environment of aircraft pods, in order to solve the problem of bit error in the image transmission link, an FPGA-based LVDS isolated bit error test system was proposed. Compared with the limitations of the current mainstream test error methods, a new incremental code coding method and a dynamic training mechanism are designed to realize the functions of bit error detection, positioning and optimization of the image acquisition and transmission link of the aircraft pod. Experiments show that the system has good bit error detection performance under different typical harsh working conditions, and by extracting the time series characteristics of bit errors in the test data, the designed dynamic model online learning mechanism updates the weight, which significantly improves the accuracy of bit error prediction and verifies the effectiveness and practicability of the system.

Abstract：The effects of capacitor network on power handling capability of Radio-Frequency Silicon-On-Insulator (RF SOI) switch were comprehensively investigated in this work, including the horizontal coupling capacitor Cdsn between the RF Switch Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) drain-to-source, and the vertical coupling capacitor Cgndn between the RF Switch MOSFET drain/source-to-gnd. The impacts of stack structure with gradual change Cdsn/Cgndn, larger 1st/2nd stage Cdsn/Cgndn and larger N stage Cdsn/Cgndn capacitor network on RF switch insertion loss, isolation and power handling capability was discussed in detail. The result can be reference as RF switch circuit design.

Abstract：Aiming at the problems such as low efficiency, complex circuit and non-isolation of strong and weak electricity in existing electric servo system, a DC-brushed motor power drive circuit with output current of 36 A is introduced in this paper. This circuit has the advantages of high efficiency, low thermal power consumption, photoelectric isolation from micro control circuit, single power supply and so on. In this paper, the circuit is decomposed into four components, and each part is explained in detail. The concrete analysis is made from the working principle of the whole circuit and the simulation experiment.

Abstract：In the field of Intelligent Transportation Systems (ITS), radar-camera integrated systems offer advantages such as lower cost and enhanced data fusion compared to the combination of standalone radar and checkpoint cameras. This study utilizes RF chip cascade technology to enhance the performance of millimeter-wave radar and integrates a professional-grade security chip to design a radar-camera integrated system with long-distance detection capabilities. A multi-sensor fusion algorithm is employed, and the target detection algorithm, YOLOv8n, is improved by replacing the backbone feature extraction network and loss function. These improvements reduce the parameter count by 24% and the model size by 22%. Real-world traffic scenario tests validate the reliability of the system, achieving comprehensive monitoring of traffic intersection scenarios. The system demonstrates a maximum detection range of 350 meters and a detection accuracy exceeding 97%, meeting the design requirements for long-range traffic radar-camera integrated systems.

Abstract：To accurately identify workers' failure to wear safety helmets correctly and enable rapid system response, this paper designs an intelligent construction site video analysis system deployed at the edge. The hardware architecture employs a cascaded configuration of two AX650N chips, significantly enhancing the system's computational power. The software solution is based on the Ubuntu operating system and integrates the state-of-the-art object detection algorithm YOLOv8n. By replacing pooling layers in the SPPF module with dilated convolutions sharing convolutional layers, the detection speed and accuracy are improved. Additionally, the WIoU loss function with dynamic non-monotonic modulation is introduced to enhance detection capabilities for low-quality samples. Experimental results demonstrate that the optimized algorithm model achieves a 1.8% improvement in average detection precision, a 17.4% reduction in model weight space, and a 7.3% increase in detection speed. System testing in multiple real-world scenarios shows that the intelligent analysis of video target behaviors achieves a success rate of over 97% with an average response time of less than 1 second. This system significantly enhances construction site management efficiency and safety.

Abstract：Optimizing existing terrestrial network base stations to provide low-altitude network services offers advantages such as cost-effectiveness and rapid deployment. Facing challenges in the optimization process of low-altitude base stations, including complex wireless environments, diverse configuration parameters, and interrelated optimization objectives, this paper proposes a multidimensional low-altitude network base station optimization model based on the Proximal Policy Optimization (PPO) algorithm. By employing ray tracing technology, the model calculates the low-altitude coverage capability of base stations with different types and angles. It constructs an optimization model that supports multiple objectives and parameter configurations for low-altitude network base stations. The PPO algorithm is utilized to derive base station configuration strategies, which are then trained and validated in a simulated environment. This demonstrates that the model can effectively generate optimization schemes for base stations and exhibits faster convergence speed and better optimization results compared to models based on the Actor-Critic (A2C) method.

Abstract：Aiming at the problem that the elliptic curve cryptography chip with limited resources often sacrifices the performance to resist side channel attack, an resisting side channel attack scheme for elliptic curve cryptography based on equal probability synchronous power compensation is proposed. Firstly, the difference function of probability distribution is generated according to the Hamming distance feature of intermediate data generated by key guessing. Secondly, an equal probability mapping model for synchronous power compensation is constructed based on the generated function. Finally, the optimal solution of the model is obtained by the simulated annealing algorithm. The simulation results indicate that the proposed scheme has almost no loss in computing performance under the condition of equal protection ability by comparing with other traditional resisting side channel attack schemes based on randomization, which is very suitable for elliptic curve cryptography chips with limited resources.

Abstract：The classical Sparsity Adaptive Matching Pursuit (SAMP) algorithm improves sparse reconstruction accuracy by iteratively adjusting the step size to approximate the true sparsity level. However, this algorithm employs the inner product matching criterion, which may lead to atom loss. Additionally, due to its inability to accurately estimate the true sparsity of the signal, the reconstruction accuracy remains unsatisfactory, resulting in suboptimal channel estimation performance. To address these issues, this paper proposes a sparse adaptive matching pursuit method for underwater acoustic channel estimation based on the generalized Jaccard coefficient. The proposed algorithm replaces the inner product matching with generalized Jaccard coefficient matching and utilizes DFT to pre-estimate the sparsity of the signal. Furthermore, a variable step size is adopted instead of a fixed one to precisely and rapidly converge to the true sparsity level. Experimental results demonstrate that the proposed channel estimation method outperforms SAMP and other conventional approaches, proving its applicability to practical underwater acoustic channel estimation.

Abstract：In surveillance videos, moving targets are easily affected by edge blurring and background noise interference, resulting in inaccurate contour extraction results. Therefore, a machine vision based algorithm for extracting the contour of moving targets in surveillance videos is proposed. Using machine vision technology to process images, combining with the image background model to establish pixel Gaussian distribution, and calculating the matching degree between each pixel value and the Gaussian distribution in the background model, pixels with matching degree below the threshold are regarded as foreground pixels, thus completing foreground segmentation. Combining chain code to encode the foreground target edge, identify the closed edge closest to the preset threshold, and use it as the rough positioning result of the target contour. Based on this, the statistical distribution parameters of the target area are fused into the grayscale optical flow image to obtain a grayscale differential image, and then extract the contour of the moving target. The experimental results show that under the application of the proposed method, the number of burrs on the target contour is always controlled below 50, and the contour extraction accuracy is high.

Abstract：Remote photoplethysmography (rPPG) is an important research direction in the field of non-contact physiological signal detection. Existing algorithms primarily extract pulse signals from specific facial regions, which results in incomplete signal acquisition and excessive noise. This paper proposes a real-time rPPG signal extraction method based on face detection, tracking, segmentation, and input noise filtering, aiming to improve the accuracy and robustness of heart rate detection. First, a small deep neural network is used to detect and track faces in video frames, accurately locating the facial region. Next, a face segmentation algorithm is employed to extract skin information. Finally, an input noise filtering strategy is adopted to remove frequency components unrelated to heart rate and signals with low signal-to-noise ratio, thereby optimizing the rPPG signal. Experiments conducted on a self-built dataset show that the proposed method performs excellently in terms of signal-to-noise ratio, mean absolute error, and root mean square error. In summary, the method proposed in this study demonstrates outstanding accuracy and stability in real-time rPPG signal extraction, providing a new solution for non-contact physiological signal detection.

Abstract：In modern software defined radio architectures, FPGA is usually used for preprocessing functions to meet real-time software requirements. However, as software defined radio systems continue to develop towards integration and intelligence, how to cope with various complex usage scenarios brings more and more challenges to system designers. Faced with the constantly increasing demand, FPGA design often exposes problems such as poor portability, strong platform dependence, high program dependence on developers, and difficulty in system integration and combination. This article selects the commonly used I²C bus control part in electronic equipment, draws on the modular design concept of "high cohesion, low coupling" in software engineering, and proposes an optimization strategy for bus control circuits. Based on component reuse, a reconfigurable I²C bus read-write control circuit is designed. This circuit has the function of configuring baud rate as needed, as well as optional APB interface and interrupt function. It provides a series of control components with read/write data bit widths of 1 B/2 B/4 B, and reconstructs the read/write data bit width by configuring the series components. This circuit has parctical engineering application value and has been successfully applied to domestically produced devices such as TPAFEA008, as well as commonly used devices such as ADT75 and LTC2991.

Abstract：To address the issues of low identification accuracy and poor real-time performance of cable terminal heads during power station inspections, a field programmable gate array (FPGA) infrared recognition system based on particle swarm optimization (PSO) to optimize back propagation (BP) neural networks has been designed. The infrared recognition algorithm includes the use of an improved region growing algorithm for segmenting infrared images, followed by the calculation of Hu invariant moments as input features for the neural network. For the PSO-BP neural network, a 7-10-1 network structure was chosen, achieving a mean squared error of 0.085 after training, which is better than the 0.136 of the BP neural network. When implemented on the FPGA, fixed-point data quantization, pipelined architecture, and parallel computing methods were employed, along with a piecewise quadratic fitting for the Sigmoid activation function. Ultimately, through simulation verification, the system achieved a recognition rate of 92% and improved the algorithm's speed by approximately six times.

Abstract：M.2 Solid State Drive (SSD) has been more and more widely used due to its own advantages, and the enterprise products also commonly use M.2 SSDs as the bootable disk of operating system. However, because it does not support hot-plug feature, it is difficult to meet the requirements of the enterprise market for high availability, 24-hour non-stop operation, data protection and online maintenance. In this paper, a novel comprehensive design scheme is proposed, which achieves the hot-plug and Redundant Arrays of Independent Disks (RAID) features with the cooperation of the carrier board, Field-Programmable Gate Array (FPGA), Basic Input Output System (BIOS) and Baseboard Management Controller (BMC). At the same time, depending on the different pin definition of M.2 SSD, the automatic recognition and compatibility of Peripheral Component Interconnect express (PCIe) and Serial Advanced Technology Attachment (SATA) buses on M.2 interface are deployed, and a new dynamic clock signal control method is introduced by using FPGA and Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET). This comprehensive design solution does not require additional hardware investment, achieves these functions with high-cost effectiveness, and improves the reliability and availability of the system.

Abstract：Current maintenance programmes for multiple abnormally operating switchgear in large power plants tend to ignore the close interactions between complex components within the equipment, which is particularly relevant for switchgear containing a variety of moving and stationary parts. In view of this, a predictive maintenance scheduling strategy is proposed, which aims to find an optimal balance between the dual objectives of maximizing the cost-effectiveness of switchgear maintenance and minimizing the risk to the grid due to equipment failure. Firstly, a failure mode and impact analysis technique is used to analyze the interdependencies between switchgear components and their potential failure modes, in order to derive a more realistic probability of failure prediction. Subsequently, a comprehensive risk assessment system is designed, which not only considers the losses that switchgear failures may bring to the grid, but also comprehensively evaluates the costs and benefits associated with maintenance activities. In order to verify the effectiveness of the method, a 10 kV substation is selected as a study case, and data analysis reveals that the predictive maintenance scheduling method proposed in this paper achieves a significant improvement of 36% in terms of cost efficiency compared to the traditional time interval-based maintenance strategy.

Abstract：Stepped-frequency ground penetrating radar (GPR) has gained significant attention and widespread application in high-resolution shallow subsurface imaging due to its inherent advantage of wide bandwidth. However, traditional implementations of stepped-frequency GPR hardware remain outdated, failing to simultaneously meet the modern requirements of high resolution, compact size, low cost, reliability, and operational flexibility. To address these limitations, this paper presents the design and implementation of a novel high-resolution stepped-frequency GPR hardware system, featuring a dual phase-locked loop (PLL) transmitter and a digital fixed intermediate frequency (IF) receiver. Additionally, a novel multi-channel bandpass filter group was developed to mitigate harmonic interference in ultra-wideband stepped-frequency signals. Extensive loopback and field experiments demonstrate that the system achieves a resolution better than 5 cm and a detection depth of at least 2.5 m, fulfilling the multifaceted demands of modern GPR applications. This work provides a valuable reference for the research and development of stepped-frequency GPR hardware.

Abstract：Ultra-wideband detection radar, because of its high resolution, high anti-interference ability and strong penetration, has gained broad prospects and market. At present, life detection radar tends to be complicated, which leads to the large size and weight of radar system, which limits its application in complex rescue and detection sites. System in Package (SiP) solves the above problem effectively. It assembles multiple electronic components with different types into a single standard package that can realize a specific function. Compared with board level design, SiP only needs to occupy 10%~40% of PCB area and 70%~80% of power consumption to achieve the same function. Based on the microsystem scheme, this paper designs a set of miniaturized life detection radar system, which achieves good portability and provides a solution for the miniaturization design of various instruments.