Abstract:HK659 chip is the basis and key for ARINC659 backplane bus system,which has been widely used in a new generation airborne electronic system. This paper puts forward the chip’s view of system design with high integrity and high fault tolerance,that bases on a fully understanding and refining the ARINC659 bus protocol and communication mechanism of the ARINC659 backplane bus,and the chip architecture,the principle and the technical enhances are analysed in detail. The chip is a communication processing chip which integrates the rich resources of the PCI host interface,ARINC659 bus protocol consistency,the interface of the command table automatically loading,the clock reset circuit and the on-chip memory,and it owns the proprietary intellectual property rights,that solved the key techniques and the bottleneck of the backplane bus application with high integrity and high fault tolerance.
Abstract:ARINC659 backplane bus is a high level reliability and a fault tolerant cabinet linearity multi-drop communication bus,that the transmission time on bus is determinate. In the avionics electronic systems,it is used on the data transmitting between line replaceable modules. This paper introduces ARINC659 backplane bus system architecture at first,that bases on the technology protocol of the backplane bus,and gives the data bus communication mechanism which accords with the protocol specifications. Then the key technologies are analyzed as a keystone in the designing of ARINC 659 backplane bus. Finally,this paper summaries the feature and application trend of ARINC 659 backplane bus.
Abstract:With the development of aviation system,the data bus between airborne-equipment has a higher request for the high- bandwidth and high real-time. At present,the traditional backplane bus,such as PCI,VME and Compact PCI and so on,can not meet the data communication requirements for the new generation of avionics systems. So a new bus of high reliability,fault tolerance and high integrity is defined,which is based on the existing industrial backplane bus——ARINC659 backplane bus. Aiming at the applications of ARINC659 backplane bus in avionics systems,this paper analyses the characteristics and limitations of the ARINC659 protocol and puts forward the future development and improvement direction. The research has positive significance for the development of ARINC659 backplane bus and the selection of avionics system backplane bus.
Abstract:With the increase of the complexity of the aviation system, it is an important problem that how to effectively monitor the bus data behavior, real-time data analysis, fault diagnosis and location. This paper presents a design of ARINC659 bus analyzer based on FPGA development, which mainly implements ARINC659 bus data monitoring, sampling, storing and fault injection test, can trigger data analysis and access behavior through the communication interface bus,which provides a perfect and reliable testing method for the real-time data analysis of the ARINC659 bus.
Abstract:ARINC659 bus is a multi-drop communication bus,which bases on the timescale drive and could be used to transfer serial data, and the transmission time on the bus is determinate,it also has the features of high fault tolerance and high reliability,and it could meet the technical requirements of the new-type backplane bus for the aviation weapon equipment’s. This paper introduces the background of ARINC659 backplane bus at first,and the technical characteristics are analysed in detail about the topological construction,the system and the principle. Finally,this paper summaries the application of ARINC659 bus,and it lays the foundations for the research in detail and application of ARINC659 bus.