" Power Electronic Technology"related to papers

Abstract:A high voltage generator circuit with low voltage is presented in this paper. Using voltage doubler circuit to get a higher voltage, charge pump circuit generates a 15 V high voltage for electrically erasable programmable read-only memory(EEPROM) normal operation in 1.3 V low voltage. A negative temperature divided voltage circuit was designed to realize a 15 V high voltage with complementary to absolute temperature(CTAT). EEPROM′s reliability was improved when the temperature changes from -40 ℃ to 85 ℃. The high voltage generator circuit has been implemented in 0.13 μm Embedded CMOS technology when the supply voltage varies from 1.3 V to 1.75 V. Its area is 600 μm×80 μm.

Abstract:With its coverage widely and access easily characteristic, PLC technology has been popularized in meters reading and home automation domains,but the channel of PLC is not perfect, there are critical power noise and all kinds interference existed. Long time practice proved that the best way to overcome the problem of PLC channel is channel coding. In HomeplugAV standard give out a double binary Turbo coding structures, but for commercial reason, this Turbo interleave structure has become the patent product of oversea telecommunication equipment manufacturer, if use this Turbo directly, maybe cause intellectual property disputes in future. In this paper, we give out a different Turbo interleave patterns ,which performance is better than HomeplugAV with the same complexity level, then give out the simulation results.

Abstract:Aiming at the problem of high power consumption caused by broad operating frequency band and high date rate of broadband power line communication(PLC) chip and based on the introduction of broadband PLC communication unit and chip,low power design techniques are analyzed in detail from various aspects of operating frequency band, physical layer, MAC layer and chip level around the influencing factor of chip power dissipation. Currently the broadband PLC chip and module have been developed successfully, and test results show the power consumption can fully meet the requirement of broadband PLC communication unit in electric energy data acquisition system for state grid.

Abstract:Java card is a smart card running a small Java based operating system that can dynamically be upgraded. This article introduce developers to the security issues of the Java card virtual machine that should be taken into account when implementing a Java card platform. This article studies vulnerabilities of the Java card virtual machine and tries to identify its shortcomings. Further studies illustrate the impact of various threats. Finally some defensive technology are presented to counteract the threats. The test results can tell the defensive technology is valid for the security of the Java card platform.

Abstract:The software and hardware requirements are relatively fixed in the standard system of the smart energy meter. The energy meter are integrally designed, once the hardware or software failure, can only take the form of the replacement of the whole device. In this paper, based on the IR46 standard, the author puts forward the technical scheme of the dual MCU smart energy meter, which is separated from the measuring MCU and the management MCU. This paper focuses on the main functions of the two MCUs, technical indicators and the corresponding key technologies of the two MCUs. The research results of this paper will have a good reference value for the development of the smart meter and its MCUs of the next generation.