Abstract：Satellite communications with the advantages of seamless coverage and large communication capacity will play a critical role in the next-generation communication systems, due to the growing demand for ubiquitous communications and high data rate transmission services. Currently, dramatic changes have taken place in satellite communications technology and information and communication industry. Recent satellite communication technologies and some new development trends are surveyed comprehensively, after outlining multi-beam antenna, onboard processing and satellite spectrum resources, overviews the integration of satellite and terrestrial systems, satellite broadband communications, and analyzes the challenges in current situation, then reveals the bright prospects of satellite communications.

Abstract：By impedance measurements of piezoelectric ceramic components, we got the piezoelectric vibrator′s parameters of equivalent circuit model and resonance frequency. Based on piezoelectric ceramic device capacitance, temperature stability, insulation resistance, medium resistance to voltage and other electrical parameters measurement and analysis also shows that after the device electrical characteristics of piezoelectric ceramic conforms to the general characteristics of capacitor, the connection wire used under low frequency parasitic capacitance is not obvious, work more stable at room temperature, the thickness of the thicker insulation products and reliability index is better.

Abstract：To reduce chip power, a reliable low power physical design is necessary. This paper introduces a improved low power physical design flow based on new PR(Place and Route) tool Innovus, from low power physical library design, to power-driven, vcd-driven placement and optimization, to low power CCOPT(Clock Concurrent Optimization) design, and to more low power optimization after CTS. Innovus is Cadence next generation PR tool, which brings a lot of low power features to help designer implement low power design, such as GigaOpt power-driven optimization and advanced CCOPT. Improved low power physical design helps reduce 15% digital power of chip.

Abstract：Power Electromigration(EM) check plays an important role in high performance chip design. In Voltus rail analysis, the current of each standard cell clusters to one point since there is only one tap extracted by default during standard cell Power Grid View(PGV) generation. But in the real world, for large standard cells, the current distributes to all contacts instead of clustering to one. Therefore, the Voltus power EM result is much more pessimistic than reality. This paper describes a method to only generate multi-tap PGV for large clock cells which are generally used in critical paths with high switching activity. With this method, better accuracy is achieved and runtime and memory are barely increased.

Abstract：IC617/IC122 support circuit check and assertions base on virtuoso GUI flow, which include GUI setup in VSE XL (Virtuoso Schematic Editor XL) checks/assertions assistant, view checks/assertions results in ADE XL, flexible post-processing for checks/assertions results, especially schematic crossing probing, which backannotate violation path and violationg devices onto schematic directly. The virtuoso checks/assertions flow can cover most requirements on both device level and circuit level check mechanisum. The GUI flow makes everything easy, designers do no need to be familiar about the syntax of the check statements, it’s more easy for designers to accept and get used to the use model, the dynamic check which base on transient simulation have obvious advantage compare with other tools. Using checks/assertions flow efficiently, can help designers avoid or find some common design issues as early as possible, thus help decrease the design iteration. The virtuoso checks/assertions flow is used in TSMC 16nm and Intel 14nm project, it helps improve the design efficiency obviously.

Abstract：The efficiency and accuracy of modeling high-speed passive channel is always the focus of simulation. The PowerSI 3D-EM in Cadence Sigrity achieve a nice combination of efficiency and accuracy. In this paper, we use TRL calibration to measure the accurate result, and then calibrate our simulation result. We also use the 3DEM/Hybrid mixed, try to keep the accuracy and improve the efficiency.

Abstract：With the technology of the integrated circuit design developing, some problems in the circuit design also arise. The verification technology plays an important role in the circuit design. At present, it is urgent for us find solutions of improving the verification completeness. This paper describes a tool newly published by Cadence, that is, ADE Verifier. In this paper, you will get to know the usage of ADE Verifier and acquire its customized application in HiSilicon. By integrating the identities of both ADE Explorer and ADE Assemble, meanwhile, and by improving the process in a simulation verification, ADE Verifier has been fairly helpful to solve the completeness problem effectively.

Abstract：The Cadence rapid prototyping platform Protium is addressing and solving challenges by providing a low cost and high speed solution that is fully integrated with the emulator in compile and debug flow, reducing the prototype bring up from months to weeks. This paper demonstrates the integrated flow of prototype and emulator in developing the AP+GPU SOC project at Spreadtrum Beijing design center. The Protium reuses the emulator compile environment and is fully automatic in FPGA implementation. It provides a 10X faster platform than emulator for software development and can still leverage the super debug capability of Emulator when runs to issue.

Abstract：Accurate on-chip inductor modeling is essential in these applications. But to get accurate inductor model, in most electromagnetic simulation software, it is need to extract technology parameters from foundry technology library file manually. So it is relatively complicated to establish simulation environment and simulation time is long. This greatly reduces the efficiency for optimization of circuit performance and layout area.Virtuoso with 3DEM-integrated can select layout to do model extraction directly, without the step to input technology parameters manually. It can generate technology parameter according to foundry provided process library file and set up the simulation environment. With optimized extract algorithm, simulation speed has obviously improved and results are quite accurate. In this paper, we demonstrate our application of using 3DEM to extract accurate on-chip spiral inductor in high speed serial link design.

Abstract：Verification engineer usually write verification plan(vplan) at first, and then write testcase according to the vplan. However, after a period of time，the testcases do not match the verification plan, and in this case the verification plan is a mere formality. Moreover, verification engineer the verification engineer needs to debug problems, regress, and report to verification manager about the process of jobs. Various things need to be done. This paper whick takes geMac Verfication as an example，and with the help of Cadence’s vManager, using vManager’s regression center,Metric Center and Tracking Center demonstrates how carry out verification job more efficiently and scientificly.

Abstract：The scale of modern SOC design is larger and larger，for ten million gates block，presents a clock structure improved from the Fishbone-based clock structure。Compared to CTS clock tree，clock latency，clock skew，On-Chip-Violation（OCV）and dynamic power of clock is smaller。This paper is based on YCU-AM，a 26 million gates block，to describe the implementation method of the improved clock structure。Experimental results show that the improved clock structure can make the total block save about 5% power.

Abstract：Bonding wire lift-off is a common failure mode,which will first affect the gate stray impedance. The changes of the gate stray impedance cause changes in the signals of the gate,which can be characterized by signals of the gate,and then determine whether there IGBT chip aluminum bonding wire lift-off or not. In this paper,the relationship between bonding wire failure and the gate stray impedance is studied results provide important basis for identifying bonding wire failure of IGBT module.

Abstract：A X-band negative-resistance oscillator is designed by the negative-resistance method. The design aimed at improving the oscillator efficiency and the second harmonic suppression. It is found that selecting an appropriate DC bias can improve the efficiency of DC to RF transformation from the research of effects of the DC bias on the oscillator efficiency. Meanwhile, the second harmonic can be effectively suppressed by adding a λ/8 open-circuited stub to the output matching network and choosing a suitable blocking capacitor. Measurements show that the oscillating frequency is 10.81 GHz with output power of 8.02 dBm. The second harmonic suppression is 48 dBc and the efficiency of DC to RF transformation is 45%. Moreover, the phase noises are -91.90 dBc/Hz at 100 kHz offset and -123.43 dBc/Hz at 1 MHz offset. The effectiveness of the above design method is demonstrated, which provides some references for the design of the negative-resistance oscillator.

Abstract：Hardware Trojans draw more and more attention of the academia and industry because of its huge potential in recent years. Traditional testing technology is difficult to find these hardware Trojans. To solve this problem, considering the hardware Trojan hidden mechanism, a rapid hardware Trojan activation method is proposed in this paper. According to implant several hardware Trojan prototypes into microprocessor OR1200 and take advantage of a large number of test vectors incentives, then using the rapid hardware Trojan activation method, Trojan horses are activated. Thus, the correctness of the method proposed is verified.

Abstract：In the sensorless vector control of PMSM, the estimate of rotor’s position and speed need to be achieved. In order to improve the precision of rotor position, a new-style siliding mode observer was designed in this paper.Firstly,motor parameter was on-line identificated with Forgetting Factor Recurisive Least-squares Algorithm in this paper,and then,motor parameter was feedbacked on line to siliding mode observer to improve system function.Finally, this algorithm was proved with simulink. Simulation results show that this algorithms can overcome the harmful effect of the change of motor parameters and it has superior capability.

Abstract：A Solar tracking system is applied in new energy industry widely by locating and tracking the Sun in time. A high-precision solar tracking system was developed based on two sensor modules, one of which is GPS module for roughly locating, and another one is PSD sensor module based on a small hole optical part. We have optimized-designed the sensor to ensure the tracking accuracy, then we have optimized-designed the algorithm in the way that combining roughly locating with high-precision tracking for improving the tracking speed.

Abstract：To meet the test and validate requirements of multifunction vehicle bus devices in train communication network, based on the test method of general bus and combining with the characteristics of the MVB bus protocol, this paper presents a test method based on fault injection technique. By means of the definition and configuration of the card registers, Multifunction vehicle bus fault injection device driver, based on VS platform, was developmented. MVB bus fault injection method and part of the driver are given in detail，in terms of physical, electrical, and protocol . Through the way of Wireshark graping messages to verify accuracy of fault injection, and prove the feasibility and correctness of this method.

Abstract：The PCI existed the problems of low transmission speed, high complexity and PCI Core prices,a new design scheme of PCI bidirectional interface based on WISHBONE bus was presented in this paper. The system architecture used open source called PCI-WISHBONE IP core and implemented a PCI interface card based on Xilinx Artix-7 series FPGA chip, which is compatible with 3.3 V and 5 V voltage and is focused on a method of high speed data transmission using DMA. The experimental results confirm that data transmission rate can reach to 65?鄢32 Mbit/s when the PCI bus is run in the master mode,Transfer rate has been improved significantly with data transmission accuracy and stability. It provides a new sort of methods for the high-speed PCI interface design.

Abstract：A ground test system for the experimental apparatus of the two phase fluid loop is designed to simulate the two phase fluid experiment and to validate the reliability and stability of the experimental device. According to the phase transition process and transport process characteristics of the two-phase fluid，a new differential thermocouple temperature measurement scheme and a temperature control method based on high-power H bridge are proposed. The hardware system composed of sensor module and actuator module is designed, in which the STM32F4 is taken as the master controller. Besides, the development of the monitoring platform based on LabVIEW is realized. Finally, the actual measured results show the system is stable and reliable by debugging the system.

Abstract：A new scheme of digital signal processing in ultrasonic receiver which is suitable for engineering application was came up with. This scheme, summarized as a five-step algorithm, utilizes Butterworth IIR digital filter as the input and output side of this system and combines a new envelope detection and sampling process. The implementation methods, working principle and necessity of each step are introduced in detail. Combining the characteristic of five-step algorithm, a new algorithm of tracing by every vertex to calculate the echo transit time is given and the algorithm can avoid the contradiction between software delay and timeliness requirements. The comprehensive simulations and experimental measurements show the scheme in this paper can effectively filter out the interference of channel noise, accurately extract the envelope information and record peak arrival time. It is immensely meet the needs of real-time performance and stability of ultrasonic ranging system.

Abstract：Multi-Mode Radar Signal Generator can be used to test the performance of electronic surveillance equipment at low SNR and generate deception jamming signal. The design of digital multi-mode radar signal generator based on FPGA is presented, which has the ability of generate a variety of conventional radar signals and the low probability of intercept (LPI) radar signals. And main signal generate module is packaged as IP core that has the advantage of high flexibility and Reusability. The method of signal generation using DDS has been proposed, and then the top-level structure of multi-mode radar signal generator is designed according to the radar signal modulation mode. Test on Xilinx Zynq-7 xc7z010clg400 show that the design consumes fewer resources and output data transfer rate of up to 500 MS/s.

Abstract：In view of the global positioning system(GPS) positioning errors caused by multipath signal positioning process, especially the zero frequency short multipath caused by localization of tailing phenomenon in the static environment. The first quantitative gave the model of residual multipath after controlled of base band multipath. That is, the multipath showed "rectangular" type distribution. On this basis，proposed an adaptive multipath residual estimation extended Kalman filter to estimate the residual pseudo range measurement error. The estimated pseudo range measurement error of the mean and standard deviation in the fitting window,as the covariance matrix of measurement error in EKF algorithm, realizing the dynamic EKF estimation in multipath. Finally, simulation results show that the adaptive multipath residual-estimation extended Kalman filter(ARKF)can effectively suppress the zero frequency short multipath effects.

Abstract：Agricultural environment parameters was very important to agricultural biological survival and development. Suitable agricultural environment could promote crop growth. This project embarking from the agricultural informationization and combining the cloud storage and Internet of Things, realized remote monitoring of vast farmland environment parameters. Multi-nodes and remote model were used to acquire environmental parameters. Master-slave structure was designed to transmit data. Wireless communication module of 433 MHz combining gain antenna was designed to realize remote wireless communication. WiFi module controlling by serial port was designed to complete communication with cloud. Modified weighted average algorithm was used to data processing to improve the authenticity and reliability of the data communication. The user could realize the remote access through the network to monitor and manage the agricultural environment parameters.

Abstract：Aiming at the defects of hard threshold function and soft threshold function in wavelet threshold de-noising algorithm, a new threshold function was proposed combining with the existing literatures. The new threshold function can overcome the weakness of traditional threshold functions, and guarantee the continuity of threshold function. At the same time, the function can be flexibly adjusted by changing the parameters. Based on the new threshold function, a new wavelet threshold de-noising algorithm was proposed combing with an improved threshold selection method. Though MATLAB simulation, several kinds of wavelet de-noising algorithm were tested and analyzed, using signal-to-noise ratio and root-mean-square-error as two indicators for evaluation. The results showed that the new noise reduction algorithm proposed obtained better noise reduction effect compared to the traditional de-noising algorithm.

Abstract：In order to realize the monitoring of SF6 gas leakage in power system, in this paper, ultrasonic technology was used to detect it. Through the theoretical model of trace gas concentration, the correlation between concentration and velocity of sound velocity is found, and the detection model of single channel ultrasonic sensor is further established. DFT digital phase measurement method is used to calculate the velocity of sound and the SF6 gas concentration is further calculated. The SF6 standard gas detection test is done on the developed ultrasonic measurement system, the experiment is carried out on the design of gas calibration device in order to make sure the reliability. Experimental results show that the method is feasible to measure the leakage of SF6 gas, and the precision can reach ?滋L/L level, average relative error is about 5%.

Abstract：In view of the practical application requirement of the generation unit performance evaluation and field operation parameter test, the basic test characteristics and data acquisition principle of the generation unit are studied. In order to avoid the shortcomings of traditional manual testing methods, such as sensors wiring complexity, high labor intensity, large data precision error and poor security, a test data acquisition system based on LabVIEW and WiFi wireless communication technology is designed. The data acquired by field micro controller are transmitted to the host computer through the TCP/IP protocol, and the host computer is developed using the graphical programming language and modular programming technique. By this means the test data intelligent acquisition and processing of the vertical axis wind turbine generation unit is realized, which is beneficial to the further development of the function. Experimental results show that the design of the data acquisition system is correct and effective.

Abstract：With regards to the underground garage “gas-fired radiant heating system heating method”, an intelligent constant temperature centralized control system, which can be single operated or multiple joint controlled, was designed based on the STM32 MCU and CAN bus technology. The system is composed of four parts: the PC client, the information collection controller, the temperature controller and the temperature collector. The system scheme, hardware design and software design were introduced in detail, and the experimental results were given. The system has the functions of centralized monitoring, independent setting, automatic operation, node expansion, power consumption detection and fault protection and so on, and it has a good real-time performance and stability.

Abstract：The coupling effect between the inductive current at different elements of commonly used arrays is hard to eliminate completely, which will inevitably deteriorates the performance of the direction-of-arrival (DOA) estimators for narrowband cyclostationary signals. The bias introduced by the effect of mutual coupling is taken for predictable in this paper because of the determinacy of the mutual coupling for a given array, and by constructing the pseudo data matrices used in the narrowband cyclic methods, or rather Cyclic MUSIC and Extended Cyclic MUSIC, a closed-form expression for the biases in both uniform linear arrays(ULA) and general linear arrays(GLA) are obtained. Sufficient numerical experiments are carried out to validate the veracity of the theoretical biases in different signal environments and for different array shapes.

Abstract：In order to reduce the multipath effect in the wireless environment, the angle of arrival(AOA) and the time of arrival(TOA) the multipath component of the channel model are required. Therefore, the concept of the Geometrically-based single-bounce channel models(GBSBCMs) is generated, which assumes that the scattered bodies are uniformly distributed in the elliptical(macrocell) or circular area(microcell). In the macrocell and microcell, it is assumed that the scattering body elliptical model(EM) or circle model(CM) may be reasonable, but for the general scattering model to ensure that when the scatterer for other kinds of distribution are effective，it is necessary to obtain channel parameters. In this paper, the joint probability density function and the edge probability density function of the arrival angle and the arrival time delay of the base station signal in the general scattering model are derived. This paper focuses on the Gaussian distribution of the scattering body, and the simulation results verify the derivation of this paper.

Abstract：Network-on-Chip(NoC) mapping algorithm has significant impact on system power consumption，latency and other performances. An improved multi-objective genetic mapping algorithm based on the communication links is proposed to decrease power consumption and latency. The algorithm designs a new chromosome initialization method whose communication links directly decide the positions of tasks in network. And a new mutation operator is used to getting offspring. The new algorithm reduces the complexity effectively and can accelerate the rate of converging. The experiment is implemented on NIRGAM, results show that power consumption and latency on DVOPD decreased 49.76% and 53.23% respectively. Compared with traditional multi-objective genetic algorithm, the result on VOPD can get power consumption 29.54% reduced and latency 32.45% reduced respectively. When come to MPEG-4, power consumption decreased 45.72% and latency decreased 49.40%. Similarly, compared with simulated annealing algorithm, performances of power consumption and latency of the proposed algorithm improved obviously.

Abstract：Network coding is an emerging technique known to improve the bandwidth utilization for non-safety applications in VANETs. However, the delay of message transmission is increased by network coding, and it results in tradeoff problem between bandwidth and delay. Therefore, for message transmission in VANETs business application, the Bandwidth and delay-Network coding-based message transmission protocol is proposed in this paper, which is marked as BDNC. When there are two sources broadcasting the data into the same area at the same time, the relay will use the network coding technique to decrease the number of rebroadcasting events and the consumption of the bandwidth. However, a fundamental problem for the relay when it receives a packet, is whether to wait for a coding opportunity and save the bandwidth or send the packet directly and reduce the delay. In order to address such tradeoff, two versions of the protocol named buffer size control(BSC) and time control(TC) are introduced to control the delay that is experienced by the packet at each hop, while achieving better bandwidth utilization. Up to 38 % improvement in the bandwidth utilization has been recorded, and both schemes have shown a considerable amount of control on the imposed delay.

Abstract：Multi-User Shared Access is a non-orthogonal multiple access scheme of 5G，which has a long running time, a large time delay and a high computational complexity due to the usage of successive interference cancellation detection algorithm. As for the demands of low latency and high reliability of 5G, a fast nonlinear detection algorithm is proposed which is based on PIC structure, and it does not require multi-stage structure of PIC. In the algorithm, the received signal goes through the MMSE detector, and its outputs are regarded as the inputs of PIC detector. The proposed algorithm avoids the repeated ordering and the repeated inverse matrix calculation of the SIC algorithm, which reduces the running time by 54% and the computational complexity to a lower level without SER performance degradation.

Abstract：Aiming at that off-line VoIP identification for the complex network environment can not meet high accuracy and real-time demand in traffic monitoring system, a VoIP traffic online identification system is designed and implemented. First, based on WEKA which is a data mining tools integrated many machine learning algorithms, an extended training set is used to filtrate convection statistical characteristics and a classification model is built by machine learning algorithms. Then JPcap database is used to design a capture and detection mechanism to achieve rapid identification of VoIP traffic. Experimental results shown that the online identification system can classify real-time VoIP traffic and reached 92% accuracy.

Abstract：In order to improve the effect of infrared imaging of the circuit board, the quantum-behaved particle optimization algorithm is proposed. Firstly, position of particle was updated in the quantum space, and relationship was established between the stagnation coefficient and the contraction expansion coefficient. Secondly, method was determined the particle stagnation, which was reduced the invalid iteration. Finally, infrared image of circuit board was enhanced by incomplete beta function.Experimental simulation shows that quantum-behaved particle swarm optimization algorithm infrared image enhancement of circuit board is more clearer than other algorithm, the mean square error is declined significantly, and peak signal to noise ratio is significantly improved.

Abstract：This paper presents a human motion matching and evaluation method with Kinect sensors aiming at motion rehabilitation. This method extracts the three-dimensional coordinates of bone joints by Kinect during exercise in real-time, and calculates the size of the space angle bone joints to obtain a set of spatial change angle of action sequence. Then through the improved DTW algorithm to match the two actions angle sequence of values, the distance between the two sequences is gotten. Finally through the K-means clustering method，the size of the distance is assessed. Experimental results show that this method can achieve a good match and evaluation of human action, good real-time. Compared with traditional DTW algorithm，its recognition rate has improved significantly.

Abstract：In order to collect criminal evidence in coordination with other security system, a coordinated-forensic method based on shared memory multi queue(CFMMQ) is proposed in this paper. A efficient communication algorithm is designed based multi-queue notify-signal mechanism by share memory to solve the problem of large data communication in network collaborative forensics. The communication protocol between forensic center and security system is designed based intrusion detection message exchange format(IDMEF). The aim of method is to make network forensic collect other security availably.

Abstract：The driving power is one of the key components for piezoelectric actuated inkjet head. In order to design a driving power for an inkjet head, the characteristics of actuating structure on shear mode piezoelectric actuated inkjet head are considered. the approximate liner increasing relationship between the actuating wall displacement in the range of 0.11～0.32 μm is analyzed with driving voltage of 20～60 V，and 15 kHz resonant frequency of actuating walls is derived. A “three cycle” driving mode on the jet channel is researched and analyzed. Then a switching mode DC power which can drive inkjet head is implemented. The realized parameters of the driving power are shown as follows: supplying 32 inkjet channels grouping jet, the maximum voltage outputs of ±60 V, positive and negative pulse width and setting time online adjusting in 15~200 μs, the minimum current outputs of 6 mA in one channel, maximum error of 3% in a pulse width. The feasibility of driving power has been tested.

Abstract：A novel predictive current deadbeat decoupling control strategy based on SVPWM was adopted aiming at the delay of the conventional deadbeat controller in controlling and the problem that controller in decreasing static error and anti-interference. The new predictive current deadbeat could solve the problem of phase locked compared with traditional deadbeat controller in current loop. it is simulated tracting output current by the method of deadbeat and decoupling control of power under dq reference frame using gird voltage vector control in PSIM. The performance in phase locked of the control method are verified by simulation and experimental results.

Abstract：The direct power control with space vector modulation is applied into the parallel system and then a virtual voltage vector is constructed, so that no power grid voltage sensors and the hardware cost in the system reduced can be realized. By improving the traditional SVPWM control module to achieve the purpose of inhibition of circulation, thereby the energy loss in the system can be reduced. Compared to the traditional control strategy in parallel system based on grid voltage orientation, a new method of the circulation control in this paper have been put forward can achieve the same performance, and the number of sensors can be greatly reduced. Through this simulation experiment, the validity and feasibility of the proposed improvement strategy has been verified.

Abstract：To solve the disadvantage of traditional-anlog power supply low and less efficiency under light load condition, the scheme of digital integrated control based on the DSP is proposed. The basic idea of the proposed control technique is to control both DC-link voltage of PFC stage and switching method of full-bridge stage. Under light load condition, the output voltage of PFC stage is adjusted dynamically and switch frequency to reduce the switching losses and circulating current losses .The results indicate，in 10% load condition，the efficiency reaches 85%，and in 5% load condition，the efficiency is higher than 80%. The integrated control scheme can improve efficiency.

Abstract：With the development of the aviation electronic technology, the original 1 Mb/s bus transmission rate has been unble to meet the requirements of the airborne bus data transmission, high-speed GJB289A data bus technology arises at the historic moment. In order to guarantee the correctness of the functionality and performance of high-speed GJB289A data bus, conformity of the bus protocol and the reliability of communication system, the test method of the research on high-speed GJB289A bus system is very necessary. This paper mainly realizes the research of high-speed GJB289A bus system test method from three aspects of electrical characteristics, protocol conformance and system communication, and introduces the high-speed GJB289A bus system set up test platform and test method, which lay the foundation for subsequent high-speed GJB289A bus system design, exploitation and development.

Abstract：ARINC659 is a Muti-node and serial communication bus，which has the time desterminability on bus transfer. When the bus system is apply to in the process of communication,in order to guarantee its high fault tolerance, high redundant flexibility and high reliability,it is very important to have the bus fully tested,which can also ensure the reliable usage of bus system safety. This paper offers the test platform for ARINC659 bus. On this basis，from physical layer and data link layer,this paper conducts a comprehensive research and analysis on ARINC659 bus，which is of great significance to import the reliability of bus system.

Abstract：The FC simulation and verification system provides an effective way for construction of FC network. This paper introduces the process of the construction of the FC simulation system and the solutions of the key technologies such as the related data transceiver, exchange, monitoring, analysis, collection and record of the key technologies in details. FC simulation and verification system provides the basis system of theory, solutions of system and test verification platform for application of FC network technology.

Abstract：1394 bus is a bus standard with flexible, high speed and extensible. In order to ensure the correctness of the function, performance, protocol conformance and system application reliability of the 1394 bus in a new generation of aerospace system, it is a necessary mean to make a system testing for the bus system. A logic circuit used to analyze 1394 bus data is proposed in this paper, which embedded in the hardware of a 1394 bus analyzer, can realize monitoring, analyzing and storing the data from a 1394 bus, and then analysis results can be get through the host interface of the hardware. By the 1394 system integration testing and the mission of fighting test, it is indicated that the logic circuit can monitor and analyze the 1394 bus effectively, and be of great significance in the development of aerospace 1394 bus system.

Abstract：AFDX high-speed flight network system needs real-time sampling key parameters, so research and development of a high-speed, real-time and high reliability AFDX data acquisition are particularly important. This paper presents a FPGA-based data acquisition designed to take full account of the specific AFDX network technology, such as integrity checking, redundancy management, virtual link, bandwidth isolation and traffic shaping. It has achieved real-time collection of network data, parameter selection and data forwarding functions. By the test of AFDX data acquisition，it is proved that the equipment has the characteristics of versatility, high reliability, real-time, high speed data processing and so on. The data collector which is fully meet the application requirements of the AFDX network data acquisition has completely independent intellectual property rights, and provides a strong guarantee for the development of the nationalization and the flight test of large aircraft.