Abstract：Ultra-reliable and low latency communication(URLLC) is one of the three big scenarios in 5G, and is paid more and more attention now. Internet of vehicle is one of the application about URLLC, and it has high requirement about reliability of information transmission. In order to improve the reliability and robustness of transmission, several transmission schemes of Multi-TRP based URLLC is introduced from the perspective of SDM, FDM and TDM, and the merit and demerit of these schemes are compared with each other. In addition, a new method of indicating dynamic switching between these schemes is proposed, and the performance is evaluated. Based on the simulation results, significant performance gain can be obtained by the scheme of dynamic switching.

Abstract：Combined with the fusion technology of MEC and C-V2X，a green wave transit system based on 5G vehicle network is studied, and relevant researches are made on the green wave transit model, application of MEC and collaborative control management. This system can realize real-time vehicle-road coordination with lower time delay, and realize coordinated perception of traffic light information at multiple intersections, so as to realize the continuity of the green wave priority, reduce traffic congestion at intersections and improve transport efficiency.

Abstract：Due to the short board of delay and reliability, LTE V2X can only be used in assistant driving and primary driving scenarios. It is necessary to meet the future demand of advanced automatic driving by updating technology. The opportunity 5G cellular car networking NR V2X emerges as the times require. Combining with the standard process of 3GPP 5G NR V2X, this paper focuses on the key technical requirements and solutions of 5G NR V2X based on the analysis of application scenarios for advanced automatic driving, and introduces the current standardization progress.

Abstract：In this paper, the development trend of intelligent transport system(ITS) and the state art of vehicle-road collaboration are introduced. This paper focuses on the cloud-network-edge-terminal architecture of vehicle-road collaboration, includes central cloud, transport private network/telecommunication network, edge cloud, vehicle/road-side terminal and their collaborations.The open framework of information service capability of multi-source data fusion based on cloud-network-edge-terminal architecture for vehicle-road collaboration is presented. The specific functional requirements, API invocation methods and protocols are discussed in detail.

Abstract：With the development of semiconductor technology, characteristic frequency of transistors have been improving so far and into THz frequency range, which makes it possible for solid state devices to work in THz frequency range. THz amplifier plays a key role in THz system because of its function amplifying weak THz signals. This paper introduces the latest research progress of THz monolithic amplifier based on Gallium Nitride(GaN) High Electron Mobility Transistor(HEMT)，Indium Phosphide(InP) HEMT and InP Heterojunction Bipolar Transistor/Double Heterojunction Bipolar Transistor(HBT/DHBT).

Abstract：The terahertz(THz) wave is located in the transition region of photonics to electronics, and has important application prospects in high-speed broadband communication, radar, imaging and other fields. However, the devices currently used for dynamic regulation of THz waves are still lacking, which limits the development of THz technology to some extent. VO2 has an unique metal-insulator phase change characteristic, and the phase change process can be applied to dynamically regulate THz wave transmission. It is also a recent research hotspot to explore the combination of metamaterials and VO2 to prepare efficient, dynamic and flexible terahertz functional devices. In this paper, the phase transition characteristics of VO2 are briefly described, and the effects of microstructure and chemical composition on phase transition characteristics are analyzed. The research progress of VO2 film in THz band regulation performance is reviewed systematically, and the different combinations of VO2 and metamaterials are summarized. In the application of THz wave dynamic regulation, the development prospects and challenges of THz wave regulation function devices based on VO2 phase transition characteristics are prospected.

Abstract：AlAs/InGaAs/AlAs resonant tunneling materials was optimized, and terahertz resonant tunneling diodes grown by MOCVD is first fabricated. The epitaxial layers of the RTD were grown on semi-insulating InP substrate. InP-based RTD were fabricated by using contact lithography and air bridge technology.The electrical characteristics of the device were tested at room temperature. The peak current density of our RTD exceeded 400 kA/cm2, and the peak to valley current ratio of our RTD was 2.4.

Abstract：Aiming at the low precision of multi-scale face detection caused by large passenger flow and complicated background in large places such as stations and shopping malls, a multi-scale face detection method based on RefineDet multi-layer feature map fusion is established. Firstly, the first-level network is used for feature extraction and the face position is roughly predicted on the feature maps of different scales. Then, in the second level, the feature pyramid network is used to fuse the low-level features and the high-level features together to further enhance the semantics of small-sized faces information. Lastly, the detection box is secondarily suppressed by the confidence and focal loss function to achieve accurate return of the border. In the experiment, the aspect ratio between the width and the height of the face candidate region is only set to 1:1 in order to reduce the amount of calculation and improve the face detection accuracy. Experimental results on Wider Face datasets show that the method can effectively detect different scales of human faces, and the test results of MAP(mean average precision) on the three sub-data sets of Easy, Medium and Hard are 93.4%, 92% and 84.4% respectively, in particular, the detection accuracy of small-sized human faces is significantly improved.

Abstract：Identity authentication technology has developed greatly, and there have been various fraudulent means of forging legitimate user information. Aiming at this problem, this paper proposes a deep learning face detection algorithm to analyze the difference between real face and fraud face, decentralize the real face and photo, zca whiten to noise, random rotation and other processing. At the same time, using the convolutional neural network to extract the facial features of the photos, the extracted features are sent to the neural network for training and classification. And the algorithm is verified on the public database NUAA. The experimental results show that the party reduces the calculation complexity and increases the recognition accuracy.

Abstract：Aiming at the problems of higher computational complexity and larger memory requirements of current object detection algorithm, we designed and implemented an FPGA-based deep learning object detection system. We also designed the hardware accelerator corresponding to the YOLOv2-Tiny object detection algorithm, modeled the processing delay of each accelerator module, and describe the design of the convolution module. The experimental results show that it is 5.5x and 94.6x of performance and energy gains respectively when comparing with the software Darknet on an 8-core Xeon server, and 84.8x and 67.5x over the software version on the dual-core ARM cortex-A9 on Zynq. Also, the current design outperforms the previous work in performance.

Abstract：Quartz vibrating beam accelerometer expresses acceleration in the form of frequency output. In the inertial navigation system, it is necessary to convert the frequency value into an acceleration value and then perform attitude calculation. Using software method for floating point calculation requires a lot of computing power of CPU. In order to optimize the calculation speed of frequency conversion, the paper designs a floating-point calculation acceleration unit for frequency conversion applications, which is implemented and verified based on FPGA. The results show that the system from data sampling to frequency conversion, then converts the frequency value into acceleration for the attitude calculation. The angular velocity measured by the gyroscope is integrated, and finally the data fusion is completed. Using the floating-point acceleration unit designed in the paper to achieve frequency conversion, the speed is improved by 2 times.

Abstract：As the key operation, modular multiplication is the highest frequency of use in elliptic curve cryptography algorithm. Improving its operation speed is great significant to improve the performance of elliptic curve cryptography processor. Based on Kogge-Stone add structure, and combined with reconfigurable technology, this paper implemented a modular multiplier which support the operation in both prime field GF(p) and finite field GF(2m). And this modular multiplier reuse logic unit reasonably to save hardware resources. The modular multiplier was described by Verilog VHDL, and integrated in CMOS 0.18 μm technology library. The experimental results show that the maximum clock frequency of this modular multiplier circuit is about 476 MHz and use about 66 518 gates of hardware resources. The 256 bit Dual-field modular multiplication can be finished in 0.27 μs.

Abstract：This paper presents a novel all-digital phase-locked loop with variable phase accumulator circuit structure. The design of the system is completed by using EDA technology, and the system simulation experiment is carried out by using ModelSim software, and the hardware experiment is carried out. The experimental results show that the all-digital PLL with variable phase accumulator can extend the phase-locked range of the system loop, increase the frequency of PLL,reduce the total power consumption of the system, and do not increase the logic resources in the FPGA chip. Because the internal signal of the PLL is transmitted in parallel,the speed of PLL can be greatly improved. The PLL can be embedded into an electronic system chip as a functional module, and can be widely used in communication, electronic measurement and automatic control.

Abstract：Due to the high bandwidth characteristics of HBM(high bandwidth memory), there are a large number of HBM interface connections that need to be manually completed during the layout design of the 2.5D package interposer. This article describes how to use the SKILL language to implement automatic wiring of HBM interface in APD(Allegro package design), reducing the original manual wiring from 2 weeks to 10 minutes, saving design cycles.

Abstract：In the mixed-signal chip, behavioral model is widely used to describe the behavior of the analog/mixed-signal blocks in Verilog/Systemverilog/VHDL so as to facilitate the fullchip netlisting for the fullchip Verilog simulation. In order to ensure correct，effective and comprehensine function verification of full chip，functional comparison and verification between behavioral module and transistor-level design of circuit module is very important. Currently, BVS is verified only through the logic state vector check with existing official EDA tools without real value checking. To better describe the analog/mixed-signal blocks behavior, Wreal modeling and SV-UDT are used, thus BVS check with real type vector check capability is required. This paper describes an automatic simulation method for equivalence check of both real value auto compare and logic state auto compare based on XPS vector check feature, the real type vector check is new idea provided to EDA vendor and has already been implemented in XPS successfully.

Abstract：This paper presents a high-performance wireless local area network(WLAN) chip with throughputs up to 1.2 Gb/s, designed and verified under the help of the Palladium XP emulator. The chip supports 4×4 MIMO and 256-QAM technique, and it is a high-complex and large-scale design. During the debug period, the designers have to wait for a longtime for the software simulator generating the waveform, typically one hour for one frame. However, with the in-circuit emulation(ICE) mode offered by the Palladium XP emulator and the software platform UXE, a 1000-frame testing case can be finished in 20 min and all the important waveform for debugging can be downloaded. The whole verification system greatly improves the design efficiency and helps the digital front-end developing stage finished in time.

Abstract：In advanced node, FinFET processes provide power, performance, and area benefits over planar technologies. But a vexing problem aggravated by FinFET is the greater local device current density, which translates to an increased concern for signal and power rail metal electromigration reliability failures. There is a critical secondary effect, as well the thermal profile of the FinFET influences the temperature of the metal interconnect neighborhood, which accelerates the EM failure rate probability. For now, the thermal impact has been broadly mentioned in the sight of design house. Following foundary′s user guide, Cadence Voltus provides an accurate, powerful and flexible solution. Based on it, we want to check the impact of thermal on high datablock and do more investigation to improve the power planning structure.

Abstract：For high-performance chip designs with ever-increasing scale and increasing operating frequency, performance has always been the focus and difficulty of physical design. The buffer is inserted to minimize signal line delay, which optimizes timing and improves performance. The use of Cadence Innovus tools to build physical design flows that reduce deviations between steps is described. At the same time, based on this process, a secondary layout optimization method is proposed. The process and method are verified by a high-performance chip design at 16 nm. The example results show that the design performance is greatly improved, and the timing optimization is 85.07%. The flow and method can effectively improve high performance chip performance.

Abstract：For high integrated antenna, certain method must be adopted achieve accurate and effective detection of amplitude and phase information of array. However, traditional method (including near-field calibration, FFT, etc.) all need to obtain phase information, so the antenna needs to provide reference channel for testing. This is contrary to the high integration of antenna, and also puts forward higher requirements for antenna designation, especially for the conformal antenna. In order to solve the problem that the traditional method relies on the parameter channel to provide reference phase, a self-reference method is designed for the near-field measurement, a test troubleshooting scenatio commonly used by high integrated antennas. The test results show that the results of the near-field test using the self-reference method are highly consistent with the test results of the traditional near-field measurement system with independent reference channel. In addition, self-reference method, which does not need a separate reference channel, is suitable for the near-field test of highly integrated antenna, which is of great significance for the field test arrangement of installed antenna.

Abstract：Regular inspection is an important task to ensure the normal production and safe operation of high-voltage power corridors. In view of the large space of power corridor, complex internal environment, high air humidity and harmful gas, a multi-sensor, remotely-controlled intelligent detection robot is designed to overcome the constraints of time and environment and guarantee the accuracy of the inspection results. The test shows that the inspection robot can not only complete the inspection task, but also has the advantages of strong adaptability, high reliability, flexible control and high anti-interference.

Abstract：This paper has developed a comprehensive information system that is miniaturized, integrated, digital, modular, low-power, and portable for underwater combat operations and operational needs of frogman special forces and divers. The system integrates the functions of positioning navigation, underwater communication and detection imaging, which can effectively solve the problems of watching, listening, speaking and traveling under the individual soldier′s underwater, and has broad application prospects in military and civilian applications.

Abstract：In order to solve the problem of three-band bandpass signal aliasing, a delay-adjustable third-order bandpass sampling structure is proposed. By designing a digital anti-aliasing filter, the alias-free reception of three-band bandpass signals can be realized. The simulation results are given, the signal is reconstructed and the anti-aliasing performance is analyzed. After the three-passband signal passes through the anti-aliasing filter, the signal output signal-to-noise ratio can be above 28 dB. This method solves the bandpass. The multi-signal aliasing problem in sampling increases the sampling frequency selection range, which reduces the hardware burden and improves the flexibility of the software radio.

Abstract：This paper researches the fatigue driving detection system based on the knowledge of image processing. After constructing the face correlation database, the main fatigue related information is obtained by the hybrid model algorithm. Firstly, the image is preprocessed, and the image enhancement module is added to eliminate the actual illumination interference. The face detection algorithm based on AdaBoost is used as the core detection method, and the positioning of the face is based on the driver′s eye feature. Fatigue determination is performed using a combination of human eye curve analysis and PERCLOS criteria. Fatigue driving warnings are optimized for different needs and characteristics. The experiment verifies the achievability and accuracy of the key point location algorithm through simulation test, and verifies that the actual fatigue test has good reliability.

Abstract：The uncertainty of physical parameters in earth system models has a huge impact on the performance of climate simulations. Tuning physical parameters is critical to improving the accuracy of climate predictions. Usually, in the parameter optimization of earth system model, there are multiple objectives that need to be optimized simultaneously. However, the commonly used multi-objective evolutionary algorithms require a very high computational cost for tuning earth system models. Therefore, this paper proposes a multi-objective parameter optimization method MO-ANN based on multi-layer perceptron(MLP) neural network and surrogate model. This method uses a multi-layer perceptron to build a surrogate model to improve the accuracy and convergence of multi-objective optimization. Comparative experiments on complex mathematical functions and single-column atmospheric models show that the MO-ANN optimization algorithm has obvious advantages over the evolutionary multi-objective algorithms. With the warm pool-International Cloud Experiment(TWP-ICE) single column atmospheric model, the convergence rate of the proposed multi-objective optimization method can be improved by more than 5 times compared with the known NSGAIII method.

Abstract：In order to improve the anti-power attack capability of the block cipher algorithm circuit, the concept of reverse interleaving is proposed based on the idea of masking technology. The key properties of reverse staggering are proved. An inverted interleaved circuit structure is designed, the timing alignment is disturbed by adding a first-level register, and an optimized circuit structure is obtained. The anti-energy attack capability of the algorithm is improved by power randomization. Finally, the structure is applied to the AES-128 algorithm circuit and verified by encryption, decryption, protection and computational performance. The results show that the circuit structure designed in this paper can be correctly encrypted and decrypted, and has better protection effect and computing performance.

Abstract：In engineering applications, the gain of a negative feedback amplifying circuit is commonly obtained by an estimation method. The negative feedback amplifying circuit examples of various configurations are selected, and the voltage gain is estimated and calculated. The relationship between the estimated relative error and the negative feedback depth is studied. Combined with the theoretical derivation, it is concluded that both the negative feedback amplifying circuits consisted of integrated operational amplifier and the multi-level negative feedback amplifying circuits are easy to form deep negative feedback, the gain estimation error is small; and the single-stage amplifying circuit composed of discrete components is not easy to form deep negative feedback, the estimation error is large; the deeper the negative feedback, the smaller the estimation error is; the product of the estimated relative error and the negative feedback depth is equal to one.

Abstract：The resource network interface is a communication interface that the on-chip network processing unit sends data to the router, and is responsible for packing the data sent by the processing unit into data identified by the routing node. For the high-speed transmission requirements of this interface, this paper uses a combinational logic circuit to design a resource network interface. The communication between the modules in the interface, and the communication between the interface and the processing unit and the routing node are asynchronous communication; the packager in the interface adopts a parity format design, and the cache module adopts the idea of time division multiplexing to reduce the delay of the read and write processes. The interface design is completed in Verilog HDL language and verified on the ModelSim 10.01d platform. The final verification results show that the designed resource network interface can package the data sent by the processing unit into the data identified by the routing node and meet the high-speed data transmission requirements.

Abstract：In order to reduce the complexity of the internal circuit of brushless direct current motor(BLDCM) controller, a special circuit with simple structure is proposed, which can be used to drive the microcontroller of BLDCM. The position signal of the rotor is transmitted to the controller circuit by the position sensor on the motor, and the output truth table of the position sensor is obtained. Then the corresponding digital logic circuit is obtained by using Logisim software. The simulation waveform is obtained by using the simulation tool NC-Verilog simulator of Cadence. With 80C51 as the main control chip, the final verification and analysis is completed by the way of external circuit. Through this special circuit, the rotor of the motor can rotate clockwise or counterclockwise. This special circuit can be used for the controller of brushless DC motor with low cost and low control precision.

Abstract：With the sustainable development of awareness of the security and intelligent technology for the demand of users for high safety coefficient intelligent electronic locks, Bluetooth communication technology is used to design FPGA Bluetooth communication technology based intelligent electronic lock system. Electronic lock is directly controlled by mobile phone APP for double encryption processing. It has the functions such as lock, change passwords, administrators to control user unlock information table, add and remove the lock user information. Through testing, it′s proved that the system is convenient to use, dynamic and flexible, safe and reliable.