Abstract：Plant diseases pose a significant threat to agricultural production and food security, making timely and accurate identification and treatment critical. This article reviews the current status, challenges, and future directions of deep learning in plant disease identification. It begins by outlining the importance of plant diseases and the limitations of traditional identification methods, then explores the advantages of deep learning technologies and their application prospects in plant disease identification, especially the use of YOLO series models for real-time detection. Additionally, this article compares the performance of common deep learning algorithms in plant disease identification, and analyzes challenges such as dataset diversity, real-time performance, and catastrophic forgetting. Finally, it emphasizes the importance of continuous learning and model updates, and presents future research directions.

Abstract：Existing acceleration methods for efficient and lightweight MobileNetV3 networks usually use highly customized computing engines for model calculations, which limits the scalability of the accelerator and makes it only applicable to small networks or resource-rich hardware platforms. To address this problem, this paper proposes a MobileNetV3 network accelerator based on a dynamic adaptive computing engine. Firstly, a pipeline inference architecture of local perception area convolution is designed to achieve highly parallel processing and buffer scheduling of features and weights. Secondly, a global adaptive point convolution method is proposed to optimize point convolution and combine spatial exploration to obtain the optimal parameter configuration to achieve maximum computational parallelism. In addition, the accelerator can be dynamically configured according to model parameter changes to adapt to different scenarios. Experimental results show that the accelerator's inference speed is 8 F/s, which is 2.7 times as fast as existing methods.

Abstract：In view of the strong specialization of rare earth patents and the shortcomings of existing classification methods, this paper proposes a Category Attention Block (CAB) for text classification in view of the wide application of category attention in the field of computer vision. Combined with ERNIE and Convolutional Neural Network (CNN), an innovative model ERNE-CAB-CNN for rare earth patent text classification is constructed. The model uses ERNIE to vectorize the patent text, and obtains the vector representation with richer semantic information. Then, it assigns higher weights to the key features of each category in the text through CAB, so that the model can distinguish different types of features more accurately. Finally, CNN is used to further extract other key local features in the text, and the resulting text vector representation is used for classification. Through the official website of Patsnap patent database, rare earth patent data are retrieved and downloaded to build a dataset for experiments. The experimental results show that the precision rate, accuracy rate and F1 score of the rare earths patent text classification model based on ERNE-CAB-CNN on the test set are 82.68%, 83.2% and 82.06%, respectively, achieving a good classification effect.

Abstract：As the signal transmission rate of the SerDes link increases, the signal integrity (SI) challenge increases further as the channel link passes through PKG and PCB boards, through holes, AC capacitors and connectors. This paper provides a transmission system based on SerDes 32 Gbps-NRZ channel, optimizes the design of BGA holes in passive channels, AC coupling capacitor pad, and Pin pins of FMC connectors, improves the impedance consistency in channels, and establishes a more accurate passive link channel model, combined with the active IBIS-AMI model of the chip, the influence of the optimized channel on the eye image is compared and analyzed, which ensures the stable transmission of 32 Gbps-NRZ high-speed signal.

Abstract：Secure storage of hard drives is a core issue in solid state disk related technologies. Based on the SATA interface, a hardware module is proposed to implement multiple encryption algorithms for SSD storage data encryption and decryption in the design of SSD controllers. Two algorithms, AES and SM4, are implemented. The experiment shows that the SSD disk designed in this scheme has an encrypted read speed of 223 MB/s and a write speed of 159 MB/s. The encryption algorithm proposed in this paper has no effect on the read and write speed of SATA hard drives. The encryption algorithm in this scheme is hardware parallel input, which does not interfere with the speed and other factors of the SATA interface, thus ensuring the advantages of fast encryption speed, high compatibility, high security, and strong flexibility.

Abstract：A verification method based on AHB bus DMA controller is proposed to address the problems of traditional chip verification platforms, poor reusability of verification cases, and long verification time. The validation platform modified and optimized through this method has high portability, with the ability to simulate the generation of request, reply, and interrupt signals through IP linkage, and supports the ability to randomly inject errors into the AHB bus during transmission. To demonstrate the effectiveness of the method, the architecture of the DMA controller UVM verification platform was modified and optimized, and the platform was reused to construct the Image2D controller UVM verification platform. The code coverage of two verification platforms was collected separately. The experimental results show that this method can improve the debugging and debugging speed of the verification platform, enhance the compatibility of the verification platform, save more than 15% of the verification development time, and ensure 100% code coverage of the verification platform.

Abstract：Ultrasonic motor as a new type of motor,the design of motor driver is very important.Based on 0.18 μm HV CMOS process,this article designed a dual H-bridge integrated circuit suitable for ultrasonic motor driver.The integrated circuit contains two identical independent die.Paired with simple peripheral circuits,it can produce two independent different-phase voltage outputs.In addition,the internal integrated logic control module is compatible with both TTL and CMOS input levels.The integrated adaptive dead-time control module avoids simultaneous conduction of both arms of the bridge.Finally,through demo board test virification,it can output two different-phase voltage at 100 kHz.It can be seen that this circuit can effectively drive an ultrasonic motor.

Abstract：This paper analyzes the concept of analog input bandwidth of digital oscilloscopes, studies two measurement methods of analog input bandwidth, and builds a dedicated hardware platform for testing. An automated test is implemented. Three specified oscilloscope products’ bandwidth are tested, and the corresponding baud plot is obtained, verifying the feasibility of the method proposed in this paper. Both the hardware platform and automated testing method are not only applicable to analog input bandwidth of digital oscilloscopes, but also for various data acquisition products.

Abstract：A feeder microcomputer protection algorithm based on Symlets5 wavelet is proposed to address the current situation of long sampling algorithm time in commonly used microcomputer relay protection devices for hydropower station feeders, as well as the increasingly strict timeliness requirements for cutting off faults in modern relay protection devices. Through studying and analyzing the maximum modulus of the high-frequency component waveform of the fault signal reconstructed by Symlets5 wavelet decomposition, it is found that the Symlets5 wavelet algorithm can quickly determine the occurrence of short-circuit faults within 2/n~5/n cycles after the fault occurs, and calculate the amplitude of the signal after the fault occurs. The Symlets5 wavelet algorithm can be used as a criterion for initiating protection algorithms or used in conjunction with other algorithms, which can greatly improve the timeliness of feeder protection devices in cutting off faulty lines, and protect the safety of hydropower station feeder lines.

Abstract：China continues to promote technological self-reliance and independent innovation. In the field of industrial control, discretionary security will become the main theme for a period of time in the future. Under this background, this paper puts forward a scheme of independent innovation capability construction of core controller of industrial control system with dual control system switching. The system selects both mainstream imported PLC products and domestic PLC products, designs and constructs a parallel switchable dual control system for the on-site acquisition of signals from various terminal equipment and switching control. By comparing the functions and performance of the two sets of PLC control systems, it is verified that the scheme can enable the domestic PLC to reach the same technical level as the imported PLC and achieve the same functions, and the system operates stably and reliably. This solution provides technical support for the localization of core controllers in industrial control systems by gradually verifying and promoting it at low cost without disrupting existing industrial control system scenarios.

Abstract：Existing Android malware detection methods mainly use single-modal data to characterize program features, but fail to fully mine and fuse different feature information, resulting in unsatisfactory detection results. In order to improve the accuracy and robustness of detection, a method for detecting Android malware based on multimodal feature fusion is proposed. Firstly, the permission information is encoded and the Dalvik bytecode data is visualized as a “vector” RGB image. Then, a feedforward neural network and a convolutional neural network are constructed to extract features from the data represented by text and image modalities, respectively. Finally, different weights are assigned to the extracted feature vectors of different modalities, which are added and fused before classification. Experimental results show that the recognition accuracy and F1 score of this method for Android malware both reach 98.66%, and it has good robustness.

Abstract：Aiming at the poor reliability and low transmission rate of the current data transmission system, a data transmission system is designed using FPGA and UDP protocol. The system adopts FPGA as the main controller chip and Flash as the storage medium, and sends commands to control the system through the host computer to access the data, adopts Gigabit Ethernet to be in charge of data communication and command reception, and adds a data retransmission mechanism as well as a flow control module to ensure the high-speed and reliable transmission of data. In order to improve bandwidth utilization and reduce network delay, an improved Deep Deterministic Policy Gradient (DDPG) algorithm is added for congestion control. The experimental test results demonstrate that the algorithm presented in this paper can markedly reduce network latency. The system transmission rate can reach 912 Mb/s, and the system enjoys high reliability, low cost, portability, and practical promotion value. It is also convenient for upgrading and maintenance.

Abstract：The pace of market-oriented reform concerning data elements is rapidly increasing, necessitating the establishment of a data asset registration platform capable of fulfilling the needs for property rights confirmation, traceability, evidence collection, interconnection, tamper prevention, data linkage, and license registration. This paper introduces an innovative design scheme for such a platform, utilizing Polkadot blockchain cross-chain technology. The proposed structure employs a multi-side chain extension to enable the distributed storage of registration information and access records. Integrated with smart contracts, cross-chain interactions, and data encryption technologies, the platform ensures secure circulation of registration information among various users and institutions. By detailing the implementation strategies for core functions such as data asset registration, collaborative sharing and security auditing, this paper demonstrates the practical feasibility of the platform and provides substantial theoretical support for the development of data asset registration platforms.

Abstract：Aiming at the problems of low accuracy of current field weed identification models and the difficulty of deploying multiple parameters in mobile devices and embedded devices with limited computing resources, a lightweight field weed identification model based on YOLOv8 is proposed in this paper. The model uses improved PP-LCNet to replace the original backbone network, and reduces the calculation amount of the model on the premise of ensuring the accuracy. Then, Effcient-RepGFPN is introduced as the neck network, and RFAConv is used to replace the two CSPStage modules before up-sampling. Different scale features are used to improve the performance of target detection. Finally, the MPDIoU loss function is replaced to enhance the convergence and stability of the model. Experimental results show that compared with the original model, the accuracy rate of the improved model increases by 2.1%, the recall rate increases by 2.8%, and the mAP value increases by 0.2%. Meanwhile, the size and computation amount of the model are reduced to 68.2% and 62.6% of the original model, respectively, reflecting the effectiveness of the improved algorithm in this paper.

Abstract：With the diversified development of embedded systems, continuous technological advancements and the increasing demand for applications, the hardware platforms of embedded systems are also showing a diversified trend. From the initial simple processors to the current multi-core processors, such as FPGAs, ASICs and so on, the hardware platforms of embedded systems have become increasingly complex. Power integrity, especially, faces severe challenges as the number of power channels in embedded systems increases, power consumption surges, power-on timing requirements become more stringent, and reset signal classification becomes more complex. Therefore, intelligent digital power health management units have become increasingly important. This paper implements 14-channel power-on sequence control, voltage monitoring, temperature monitoring, reset signal and configuration signal control based on TI's digital power on-sequence control circuit UCD9090 and digital PWM system control circuit UCD9244. Compared with traditional intelligent digital power health management solutions, this scheme offers flexible control, simple implementation, and requires no complex coding. The application of this solution in the system has shortened the product's time to market.

Abstract：In this paper, a new digital F-P filter circuit control system based on differential capacitance principle is proposed. The theoretical analysis and hardware verification of the system are carried out based on FPGA, and the verification results show that the system avoids the problem of poor system time stability of the existing analog circuit control system of F-P filters, and has a very high interference immunity, which provides a new way of thinking for the F-P control system with high stability and no drifting. It provides a new idea for a highly stable and drift-free F-P control system.

Abstract：Aiming at the terminal access and terminal communication security problems under Power IoT, a full lifecycle security management scheme for terminal keys under Power IoT is proposed in this paper. Firstly, the two-stage key distribution architecture based on the state secret algorithm is adopted in the scheme to achieve secure access authentication of power terminals at different stages. Secondly, the group key management model based on logical key hierarchy is adopted in the scheme to achieve lightweight encryption of unicast and broadcast data to secure the communication of power terminals. In addition, different storage and access management strategies are adopted in the scheme to shorten the access time of terminal keys by implementing hybrid storage and management of terminal keys according to key usage. The performance analysis shows that compared to the traditional access authentication and key management scheme based on logical key hierarchy, the scheme of this paper optimizes the terminal computation, reduces the computational overhead and simplifies the key update process. Compared to conventional terminal key storage and management methods, the scheme of this paper improves key access performance without changing the existing hardware platform.

Abstract：Due to the inevitable existence of various DC bias and higher harmonics in the current power grid, the traditional phase-locked loop (PLL) based on Second-order Generalized Integrator (SOGI) is sensitive to DC bias and has insufficient filtering ability for higher harmonics. To solve this problem, a cascaded second-order generalized integrator structure is proposed, which consists of three cascaded SOGI modules. The first two SOGI modules filter out the higher harmonic and DC components respectively, and then output a pair of orthogonal components through the third SOGI module. Through MATLAB/Simulink modeling simulation and experimental platform verification, the results show that the cascaded SOGI-PLL proposed in this paper has good anti-DC bias interference ability and harmonic suppression effect, which has a good reference significance for the realization of single-phase system.

Abstract：Three-level and multilevel circuits have the advantages of smaller DC voltage pulsation and reduced circuit loss, and can make DC current waveform closer to sinusoidal, so a four-switch three-level PFC circuit is proposed in this paper. In this paper, four switching tubes are combined to make it have multidirectional switching function, which can not only raise the output voltage to three levels, reduce the voltage stress of switching tubes, but also provide a circuit for inductive charging. At the same time, the circuit can open up to two switches in each mode and share a pulse signal, which simplifies the control complexity in a certain sense. Finally, an experimental platform with rated power of 800 W is built to verify the correctness of the theoretical analysis.