2026 No. 08

Publish Date:2026-08-06
ISSN:0258-7998
CN:11-2305/TN
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Special Column-High Performance Computing

Performance optimization of the Ewald algorithm on ARM architectures

DOI:10.16157/j.issn.0258-7998.257564

Author:Sa Zhihua1,Gao Ping1,2,Duan Xiaohui1,2,Liu Weiguo1,2

Author Affilications:1.School of Software, Shandong University;2.National Supercomputing Center in Wuxi

Abstract:Efficient evaluation of long-range electrostatic interactions is a critical issue in molecular dynamics (MD) simulations, particularly in charged systems where it significantly affects computational performance. The Ewald algorithm is well suited for small to medium-scale systems and high-accuracy scenarios. In this work, we systematically optimize the Ewald algorithm on ARM architectures, including linearized reconstruction of key data structures, manual vectorization of reciprocal-space calculations, vectorized trigonometric functions, and an optimized thread-parallel execution strategy. Experimental results demonstrate an acceleration of approximately 2.65× speedup under single-core conditions, with consistently strong performance across different precision settings and cross-platform tests. Under multi-core conditions, the optimized version shows superior scalability and overall performance compared with the native OpenMP implementation, achieving 86.2% efficiency and 4.57× speedup with 8 threads. This study verifies the optimization potential of the Ewald algorithm on emerging vector architectures and provides a useful reference for the efficient implementation of related algorithms on such processors.
Key word:
molecular dynamics simulation
high performance computing
LAMMPS
Ewald
ARM

Confidence-adaptive truncation algorithm for QAOA noisy pre-training

DOI:10.16157/j.issn.0258-7998.268201

Author:Dai Huasheng1,Jiang Jinhu2

Author Affilications:1.College of Computer Science and Artificial Intelligence, Fudan University;2.Institute of Big Data, Fudan University

Abstract:Quantum Approximate Optimization Algorithm (QAOA) requires classical noisy pre-training before physical deployment to obtain noise-robust initial parameters. However, the computational complexity of traditional noisy simulation scales exponentially with circuit size, causing severe computational bottlenecks. To address this issue, a QAOA noisy pre-training algorithm based on confidence-adaptive truncation is proposed. The algorithm constructs an analytical probability model of quantum circuit evolution to reconstruct the global noise space into a structured weighted tree. Furthermore, a dynamic pruning mechanism constrained by statistical confidence bounds is designed to safely truncate long-tail, low-probability error paths. Experimental results demonstrate that, while ensuring evaluation confidence, the algorithm reduces single-step simulation complexity from exponential to constant, significantly compressing computational overheads across various qubit scales. Combined with a dynamic confidence scheduling strategy, the proposed algorithm achieves a Pareto balance between computational cost and parameter convergence quality, providing an engineering-feasible acceleration framework for the efficient pre-training of large-scale variational quantum algorithms.
Key word:
quantum approximate optimization algorithm (QAOA)
noisy pre-training
adaptive truncation
confidence constraint

Research on CNN acceleration methods based on algorithmic sparsity

DOI:10.16157/j.issn.0258-7998.267881

Author:Fang Jiehong1,2,Zhu Haoyu1,2,Xiao Wan’ang1,2

Author Affilications:1.School of Integrated Circuits, University of Chinese Academy of Sciences;2.Artificial Intelligence and High-Speed Circuit Laboratory, Institute of Semiconductors, CAS

Abstract:While Convolutional Neural Networks (CNNs) exhibit significant sparsity after pruning and ReLU activation, which can potentially enhance inference efficiency, irregular sparsity distribution often leads to load imbalance. Furthermore, the sequential execution of convolution and pooling layers causes memory bandwidth waste, thereby limiting overall performance. To address these issues, this paper proposes a sparse CNN acceleration algorithm and A convolution-pooling fusion method, with verification conducted on the Cambricon MLU platform. First, an adaptive Sparse Matrix-Vector multiplication (SpMV) algorithm based on the Compressed Sparse Row (CSR) format, named Adaptive Sparse Convolution (AdaSpConv), is designed to effectively resolve the load imbalance among cores through dynamic task allocation. Second, a new storage format called Compressed Sparse Row-Convolution Pooling Fused (CSR-CP) is proposed to achieve operator fusion of convolution and pooling, which minimizes data movement and significantly reduces memory access latency. Experimental results demonstrate that on the MLU370-S4 platform, AdaSpConv achieves a peak performance of 0.828 GFLOP/s and an effective memory bandwidth of 3.39 GB/s, outperforming baseline Scalar, Vector, and Adaptive. Based on the CSR-CP fusion mechanism, the convolutional operations of VGG-16 and ResNet-50 are accelerated by 2.87× and 1.99×, respectively, compared to traditional methods.
Key word:
Cambricon MLU
sparse matrix-vector multiplication
AdaSpConv
CSR-CP

Artificial Intelligence

Research on network security data sharing strategies based on StatAvg

DOI:10.16157/j.issn.0258-7998.257665

Author:Yang Chen1,Liu Xiaoyang1,Yin Xishuang2,Cheng Yucun2

Author Affilications:1.China Yajiang Group Co., Ltd.;2.POWERCHINA Chengdu Engineering Corporation Limited

Abstract:With the rapid development of the Internet of Things (IoT) and Artificial Intelligence (AI) technologies, cyber threats have become increasingly sophisticated, posing significant challenges to traditional Intrusion Detection Systems (IDS). Federated Learning (FL), as an emerging privacy-preserving distributed learning framework, effectively addresses the contradiction between data privacy and centralized training. However, FL often encounters the issue of non-independent and identically distributed (non-iid) data in practical applications, which severely affects the performance of the global model. This paper proposes a statistical averaging method named StatAvg to alleviate the data heterogeneity problem in FL.
Key word:
Federated Learning(FL)
Intrusion Detection System(IDS)
data heterogeneity
statistical averaging
privacy preservation
model convergence

Bottom-water hypoxia prediction based on machine learning and satellite remote sensing

DOI:10.16157/j.issn.0258-7998.268048

Author:Li Junwei

Author Affilications:College of Mathematics and Computer Science, Zhejiang A&F University

Abstract:Coastal hypoxia poses a severe threat to the stability of marine ecosystems. Given the high costs and spatiotemporal limitations of traditional observation methods, machine learning and satellite remote sensing technologies have been widely applied to hypoxia prediction. However, most existing models still face challenges such as "black-box" characteristics and short prediction horizons. This study integrated bottom dissolved oxygen data from the Northern Gulf of Mexico (1998–2019) with satellite remote sensing imagery (sea surface temperature, salinity, and chlorophyll-a) to construct a spatial hypoxia prediction model that combines physical interpretability with long-term extrapolation capabilities. The results demonstrate that the XGBoost model achieved optimal predictive performance, successfully reconstructing the spatial distribution of summer hypoxia from 2003 to 2019 and effectively filling data gaps for years with missing observations.
Key word:
machine learning
satellite remote sensing
dissolved oxygen
hypoxia

Integrated Circuits and Its Applications

Evaluation and application of Smart ECO on key blocks

DOI:10.16157/j.issn.0258-7998.260801

Author:Lu Jingjing1,Sun Linjie2,Liu Yuzhao3

Author Affilications:1.Nanjing Branch of Shenzhen ZTE Microelectronics Technology Co., Ltd.;2.Shenzhen ZTE Microelectronics Technology Co., Ltd.;3.Xi’an Branch of Shenzhen ZTE Microelectronics Technology Co., Ltd.

Abstract:Before and after chip tape-out, local modifications are usually required through Engineering Change Order (ECO) to fix design defects or performance issues, while minimizing the impact on the overall design. Currently, the Conformal platform is the mainstream solution for this purpose. However, for critical modules, its FEF flow tends to generate large ECO patch size with high resource consumption, bringing significant challenges to subsequent physical integration, such as layout routing closure and timing convergence. After evaluation and practical verification on multiple ECO flows, the Smart ECO flow has demonstrated significant advantages in terms of ECO patch size reduction and runtime efficiency. It effectively reduces resource occupation, thereby significantly improving the efficiency of backend layout routing and the success rate of timing verification, providing strong support for chip design optimization.
Key word:
Smart ECO
patch size
runtime

Research and application of fast yield estimation algorithm for FMC yield estimation based on the Virtuoso Studio platform

DOI:10.16157/j.issn.0258-7998.260802

Author:Yang Xingbo1,2,Zhang Guangxiang1,2,Liu Faen1,2,Guo Yu3

Author Affilications:1.Sanechips Technology Co.,Ltd.;2.State Key Laboratory of Radio Frequency Heterogeneous Integration;3.Cadence Design Systems, Inc.

Abstract:This paper discusses an AI-enhanced Fast Monte Carlo (FMC) analysis method in the Cadence Virtuoso ADE environment. FMC adds GUI support for a yield estimation algorithm, which, together with the existing worst-samples algorithm, forms a high-sigma yield analysis solution for multiple scenarios. The core idea is to use an AI model to dramatically reduce simulation runs, alleviating the computational cost of traditional Monte Carlo. The two algorithms have complementary goals: worst samples precisely locate the worst performance points and extreme process corners from massive samples to evaluate design robustness; yield estimation quickly quantifies overall yield and failure rates via statistical inference under a fixed budget. In practice, yield estimation is first used for initial yield assessment and design trade-offs, then worst sample is applied to explore failure details at critical sigma levels to guide circuit optimization. This approach provides a flexible methodology for efficient analysis and debugging of advanced IC designs under high variability and high yield requirements.
Key word:
Cadence Virtuoso
Monte Carlo analysis
machine learning
fast Monte Carlo
bandgap

Research on agent technology for analog layout based on Virtuoso

DOI:10.16157/j.issn.0258-7998.260803

Author:Lei Yuan1,Wang Yibo2

Author Affilications:1.Hong Kong Applied Science and Technology Research Institute;2.Hong Kong Polytechnic University

Abstract:To address the bottlenecks of long design cycle, high learning barrier and poor usability of traditional automated tools in analog integrated circuit layout design, this paper proposes an analog circuit layout generation and interactive optimization framework based on the Cadence Virtuoso platform and agent technology. Integrating large language model harness engineering, the framework can accurately convert natural language instructions into layout design constraints and build a constraint-driven automatic placement and routing toolchain to realize end-to-end automated transformation from design intent to layout output. Experimental results on four typical circuits show that the automatically generated layouts achieve an average area saving of 12.11% and a maximum design efficiency improvement of 48 times. The proposed method significantly enhances design efficiency and tool usability while guaranteeing layout quality, providing a feasible technical path for the automated design of analog circuit layouts.
Key word:
analog circuit layout design
agent
large language model
harness engineering

Rapid reconstruction method for multi‑dimensional current distribution based on affine‑transformation parameter optimization and application

DOI:10.16157/j.issn.0258-7998.260804

Author:Rapid reconstruction method for multi‑dimensional current distribution based on affine‑transformation parameter optimization and application

Author Affilications:1.Department of Packaging and Testing, Sanechips Technology Co.,Ltd.;2.Nanjing University of Information Science and Technology; 3.Shanghai Cadence Electronics Technology Co., Ltd.

Abstract:In the early stage of chip-package co-design, there is no joint current analysis model and the pain point of long simulation iteration period. This paper proposes a fast reconstruction method of multi-dimensional DC current distribution based on affine transformation parameter optimization. This method designs a set of extensible loss functions compatible with multiple templates. At the chip level, by fitting the current distribution of known functional modules, the affine transformation parameters are optimized to reconstruct the current map of the entire chip. At the package level, the affine transformation parameters of multiple chips relative to the encapsulation are optimized synchronously to minimize the layout matching error and accurately integrate the current maps of multiple independent chips into the system-level joint current distribution. Then, relevant GUI tools are designed and implemented to establish a full-link mapping framework from "module → chip → encapsulation". The multi-dimensional current distribution from the coverage chip to the encapsulation can be generated within 10 minutes without the need of detailed layout, which is 30 times faster than the traditional post-simulation modeling process. Experiments show that this method can accurately capture voltage drop hotspots and electromigration risk areas in the early stage of chip design, and provide early exploration and rapid verification methods with high confidence for chip encapsulation power supply design.
Key word:
affine transformation
current distribution reconstruction
voltage drop and electromigration

Efficient dynamic power estimation of XuanTie RISC-V processor based on SimPoint sampling

DOI:10.16157/j.issn.0258-7998.260805

Author:Liu Pengfei,Lu Kongji

Author Affilications:DAMO Academy (Shanghai) Technology Co., Ltd.

Abstract:Pre-silicon dynamic power analysis (DPA) of high-performance RISC-V processors on the Cadence Palladium Z3 emulation platform is prohibitively slow for industrial workloads such as SPEC CPU 2017, often requiring tens to hundreds of emulation hours. This paper presents an efficient power estimation methodology based on SimPoint sampling, which integrates SimPoint checkpoint-driven simulation with Palladium Power Trend DPA. The XuanTie core_monitor module precisely gates Power Trend sampling to a steady-state [25M, 50M] user-mode instruction window per checkpoint, eliminating cold-start toggle noise. A four-level hierarchical weighted reconstruction aggregates per-slice DPA results into full-program average power and module-level power distribution, with all cycle-weighting data shared directly from the SPEC performance scoring flow. Across 10 SPEC CPU 2017 INTrate benchmarks, 378 representative checkpoints reduce total emulation time from ~4 500 h to ~5.5 h (over 800× speedup) with Power Trend measurement error ~±5% (validated against PrimeTime PX), fully meeting the demands of daily chip design iteration.
Key word:
SimPoint sampling
dynamic power analysis
Palladium Power Trend
RISC-V
XuanTie
SPEC CPU 2017

Backend implementation of high-performance RISC-V CPU core based on smart hierarchy flow

DOI:10.16157/j.issn.0258-7998.260806

Author:Guo Guangliang1,Ge Qiaojie2,Li Biao2

Author Affilications:1.Shanghai Damo Technology Limited Co.;2.Shanghai Cadence Technology Limited Co.

Abstract:With the diversification of AI application scenarios and the gradual maturity of the market, the demand for high computing power processor chips is becoming increasingly urgent. However, large-scale CPU cores with tens of millions of gates usually face pain points such as long design cycles and difficult high-frequency implementation. To this end, by introducing Cadence's new process methodology-smart hierarchy flow, corresponding improvements and innovations have been made from both the design and implementation ends. The design hierarchy is divided and operated in parallel, which greatly shortens the software running time in the module design process compared to flatten flow, and can achieve the function of automatically planning and cutting sub modules (Auto Partition Generator). Compared to traditional hierarchical flow, it demonstrates high-quality interface timing constraints and labor cost savings, providing a strong driving force for accelerating chip market launch.
Key word:
RISC-V
smart hierarchy flow
auto partition generator

Communication and Network

Research of home broadband internet quality analysis system based on intelligence BNG

DOI:10.16157/j.issn.0258-7998.257691

Author:Weng Sijun1,Cheng Weiqiang1,2,Jiang Wenying1,Yang Xinguo1,Yan Yu1,Liu Yang3,Yue Shengnan1,Chen Xiaobai4

Author Affilications:1.China Mobile Research Institute;2.Southeast University;3.Beijing University of Posts and Telecommunications;4.Nanjing University of Posts and Telecommunications

Abstract:To address the two core challenges of passive response and traditional fault location in operators' home broadband operations, this paper introduces intelligent capabilities into the Broadband Network Gateway (BNG) to construct an intelligent BNG-based home broadband network quality analysis system. By integrating user experience with network performance deeply, the system achieves proactive and intelligent quality analysis of services, networks, and network elements. Test results show that the system not only evaluates the performance mainstream games, but also covers the path from home terminals to operators' IP networks, providing comprehensive support for the intelligent and efficient operation and maintenance of home broadband networks.
Key word:
intelligence broadband network gateway
quality analysis
home broadband operation
fault perception

Novel dual-frequency horizontally polarized omnidirectional near-field resonant parasitic antenna

DOI:10.16157/j.issn.0258-7998.257699

Author:Qiao Dan

Author Affilications:Chengdu Spaceon Technology Co., Ltd.

Abstract:A new horizontally polarized omnidirectional antenna is proposed for the UAV application field. The antenna is designed based on the near-field resonant parasitic theory, consisting of two dielectric substrates and three metal layers. It achieves omnidirectional radiation performance through a circular array configuration. Meanwhile, by innovatively integrating tight coupling technology, meander line technology and capacitive matching stubs, the antenna realizes dual-frequency operation mode and electrically small size characteristic. Finally, the out-of-roundness performance is further improved through parasitic stubs. The measured results show that the electrical size of the antenna is only 0.237 (where is the wavelength at the lowest operating resonant frequency), resonating around 2.45 GHz and 5.8 GHz. The out-of-roundness of the horizontal plane radiation pattern is less than 0.56 dB and 1.61 dB, respectively. This antenna effectively solves the technical problem that traditional horizontally polarized omnidirectional antennas cannot simultaneously achieve dual-frequency, electrically small size and low out-of-roundness characteristics. Meanwhile, it has low processing cost and high engineering application prospects.
Key word:
dual-frequency
near-field resonant parasitic antenna
omnidirectional antenna
horizontal polarization
pattern non-circularity

Computer Technology

Carbon steel surface corrosion detection algorithm based on improved YOLOv11n

DOI:10.16157/j.issn.0258-7998.257256

Author:Ma Yunfa,Ge Chengqiang,Chen Zhenbin,Lin Luorui,Li Jiajun

Author Affilications:College of Mechanical and Electrical Engineering,Hainan University

Abstract:Aiming to address the problems of low recognition accuracy in current metal corrosion identification models and the difficulty of deploying parameter-heavy models on mobile and embedded devices with limited computational resources, this paper proposes a lightweight corrosion detection model based on YOLOv11n. The model adopts MobileNetV4 as the backbone network to effectively reduce model parameters and computational complexity. A Cross-scale Feature Fusion Module (CCFM) is used to optimize the neck network structure, which improves multi-scale target detection accuracy while reducing model parameters and computational load. The Bi-temporal Feature Aggregation Module (BFAM) is integrated into the C3K2 module to significantly enhance the model's perception capability for corrosion texture details. Finally, the Inner-MPDIoU loss function is introduced to improve the model's convergence and stability. Experimental results show that compared with the original model, the improved model reduces parameters by 51.2% and computational complexity by 25.4%, while precision (P), recall (R), and mAP50 increase by 1.1%, 4.0%, and 0.6% respectively, demonstrating the effectiveness of the proposed algorithm.
Key word:
YOLOv11n
corrosion detection
MobileNetV4
CCFM
BFAM
Inner-MPDIoU

Research on the fast active power vegulation method for source-grid-load-storage in smart distribution network

DOI:10.16157/j.issn.0258-7998.257141

Author:Liu YongCheng,Du Shenglei,Sun Yalu,Li Ding,Jin Qin

Author Affilications:Institute of Economic Technology State Grid Gansu Electric Power Company

Abstract:The source network load storage active power regulation is mainly achieved by the real-time collection of wind power and load data, combined with the fixed threshold value to adjust the power of each link of the source-grid-load-storage. The absence of refined detail partitioning for wind-PV output scenarios prevents the regulation strategy from adapting to variable natural conditions, resulting in poor regulation stability. To address this issue, a fast active power regulation method for source-grid-load-storage in smart distribution networks is proposed. The DBSCAN density clustering algorithm is employed to perform scenario clustering on historical wind-PV output data. By mining output patterns across different time periods, seasons, and climate conditions, the continuous wind-PV data are discretized into a set of typical scenarios. The state transition probability matrix is defined based on the scenario clustering results, and the Markov algorithm is adopted to characterize the dynamic evolution of wind-PV output and load demand, thereby enabling accurate short-term power deficiency prediction. The consensus algorithm is applied to model the source, grid, load, and storage as interconnected agents with communication capabilities. Taking the power demand prediction result as the overall power target, the agents iteratively update the power allocation values through local information exchange. In the experiments, the regulation stability of the proposed method is examined. The final test results indicate that when the proposed method is applied for power regulation, the peak-valley difference variation rates of the algorithm are all below 13%, demonstrating a relatively ideal regulation performance.
Key word:
smart distribution network
source-grid-load-storage
active power
fast regulation
consistency algorithm

Land cover classification in power distribution network planning area based on improved DeepLabV3+ algorithm

DOI:10.16157/j.issn.0258-7998.257198

Author:Wei Jie1,Lin Kaicheng1,Yu Bojie2,Wang Junjie2

Author Affilications:1.POWRRCHINA Fujian Electric Power Engineering Co., Ltd.;2.Department of Geomatics Engineering, Minjiang University

Abstract:Land cover classification of Unmanned Aerial Vehicle (UAV) orthophotos provides a potential solution for efficiently identifying feasible areas in power distribution network planning. To address the issues of slow training speed and low segmentation accuracy in DeepLabV3+, this paper proposes an improved DeepLabV3+-based land cover classification algorithm for UAV orthophotos. Specifically, the original backbone feature extraction network in DeepLabV3+ is replaced with a lightweight MobileNetV3 network, significantly reducing model parameters. Additionally, an Efficient Multi-scale Attention (EMA) mechanism is incorporated to enhance the model's ability to recognize features of objects at different scales, thereby improving segmentation accuracy. Experiments were conducted on a dataset constructed from real UAV aerial images of power distribution network planning areas. The results demonstrate that the proposed algorithm reduces training time and model parameters to 1/5 and 1/10 of DeepLabV3+, respectively, while achieving an mIoU of 78.83%, PA of 89.00%, and Kappa coefficient of 85.63%, confirming its feasibility and effectiveness.
Key word:
DeepLabV3+ network
land cover classification
power distribution network planning
MobileNetV3
EMA attention mechanism

Fault prediction model for urban rail vehicle air conditioning systems based on Bayesian network

DOI:10.16157/j.issn.0258-7998.257172

Author:Yu Haifei1,Liang Xiaoke1,Jia Yingwu2

Author Affilications:1.CRRC Nanjing Puzhen Co., Ltd.;2.Shijiazhuang Guoxiang Transportation Equipment Co., Ltd.

Abstract:The air conditioning system in urban rail vehicles features a complex structure and variable operating conditions, making it difficult for traditional fault diagnosis methods to effectively address its characteristics of multi-source coupling and dynamic changes. This paper proposes a fault prediction model based on a Bayesian network. The model first utilizes the auto-encoder to perform unsupervised learning on multi-source sensor data under normal operating states, achieving anomaly detection through reconstruction error. Subsequently, it integrates the Bayesian network for causal fault reasoning to accomplish fault localization and root cause tracing. Experimental results demonstrate that the diagnosis accuracy of this model for typical faults, such as refrigerant leakage, condenser fan abnormality, and ventilator abnormality, exceeds 92%, verifying its effectiveness and practicality. This provides reliable technical support for the intelligent maintenance of urban rail vehicle air conditioning systems.
Key word:
urban rail vehicles
air conditioning system
auto-encoder
anomaly detection
Bayesian network
fault prediction

RF and Microwave

Development of high integration scalable tile-type transceiver module

DOI:10.16157/j.issn.0258-7998.257655

Author:Li Pengkai,Du Ming

Author Affilications:The 10th Research Institute of China Electronics Technology Group Corporation

Abstract:A high integration 64-channel tile-type transceiver module was developed in this paper. The transceiver module adopts half-duplex operation and covers an operating frequency bandwidth of 20.5~25.5 GHz. It integrates multi functions such as bidirectional transceiver amplifier, amplitude and phase control, and passive network. For high integration, dies were assembled on the printed circuit board (PCB), and the PCB was interconnected to the radio frequency (RF) connector via fuzz button for signal interaction with outside. For good heat dissipation, some copper substrates were embedded in the PCB. An upper metal structure with 64 airtightness high frequency connectors, a lower metal structure with some airtightness high-low frequency connectors and a metal ring were welded together for good airtightness by stacked laser welding process. The transceiver module was fabricated and measured for validating the research results. The measured results show that, within 20.5~25.5 GHz, the receiving gain of the transceiver (single-channel testing) is ≥6 dB, the transmission gain (single-channel testing) is ≥15 dB, the transmission output (single channel) is ≥17.5 dBm, and the weight is about 66 g. At last, the transceiver module is scalable for applications.
Key word:
tile-type
transceiver module
scalable
high integration
laser welding

Design of high-isolation shielding cover based on 3D-SiP module

DOI:10.16157/j.issn.0258-7998.257675

Author:Ma Zhangang1,Feng Sirun1,Ji Guansong1,Wang Xin2,Niu Haijun1

Author Affilications:1.China Electronics Technology Group Corporation 13th Research Institute;2.Unit 93160 of the Chinese People's Liberation Army

Abstract:With the rapid development of phased-array radar and millimeter-wave communication systems, 3D-SiP (System-in-Package) technology has been widely applied in multi-channel T/R modules due to its high integration and miniaturization advantages. However, inter-channel electromagnetic coupling, local oscillator (LO) leakage, and oscillation issues in high-gain amplifiers have become critical bottlenecks limiting overall system performance. This paper purposes a high-isolation shielding cover design employed in 3D-SiP application scenarios, introduces the design and simulation process of the shielding cover, and demonstrates that the proposed shielding cover improves channel-to-channel isolation by over 50 dB at X band and 30 dB at Ka band, while maintaining the structural reliability.
Key word:
shield
3D-SiP
isolation

Design of an integrated signal channel for wideband airborne satellite communication terminals

DOI:10.16157/j.issn.0258-7998.257552

Author:Yang Ping

Author Affilications:The 10th research institute of CETC

Abstract:The design of an integrated signal channel for wideband airborne satellite communication terminals is described. In order to realize small size, light weight and low power consumption of the equipment, signal channel integration technologies are adopted. In the end, two prototypes were fabricated. The technical indexes of the samples satisfy the design requirement. The output power is more than 80 W. NF is less than 1.2 dB at room temperature. The weight is less than 8 kg. The test results demonstrate the technology is valid and can meet the engineering applications.
Key word:
airborne
satellite communication terminal
wideband
integrated signal channel

Circuits and Systems

Design and application of power system for low-temperature portable Raman spectrometer

DOI:10.16157/j.issn.0258-7998.257527

Author:Li Hewei,Fu Wei,Guo Hanming

Author Affilications:School of Optical-Electrical and Computer Engineering, University of Shanghai for Science and Technology

Abstract:To address the issues of significant capacity degradation, low discharge efficiency, and inadequate protection in conventional power systems under low-temperature conditions, a power system with excellent low-temperature adaptability is designed and implemented. The system uses the STM32 microcontroller as the main controller, together with battery management chips MP2659 and MS9930T for battery parameter monitoring and low-temperature protection. The integration of an intelligent temperature control module improves the discharge efficiency of the power system. The power supply test evaluates the integrated power system of a portable Raman spectrometer under low-temperature conditions. The results show that the system’s low-temperature protection mechanism is fully functional, with only 6.98% capacity decay and a discharge efficiency of 90.15%. Additionally, the system achieves a continuous operating time exceeding four hours. The portable Raman spectrometer with the integrated system ultimately demonstrates excellent stability and outstanding low-temperature resistance in applications such as polar scientific expeditions and cold chain transportation.
Key word:
low-temperature tolerance
power system
intelligent temperature controller
portable Raman spectrometer
dependable application

A single-ended output high CMTI magnetic isolation circuit

DOI:10.16157/j.issn.0258-7998.257508

Author:Chen Rongxin,Ji Yukun,Liu Jiajun

Author Affilications:The 58th Research Institute of China Electronics Technology Group

Abstract:With the development of third-generation wide-bandgap semiconductor materials such as GaN and SiC, new power transistors with faster switching speeds have put forward higher requirements for the Common Mode Transient Immunity (CMTI) of isolated drives. This paper designs a single-ended output high CMTI codec circuit, adopting an OOK (On-Off Keying) modulation structure. The encoding circuit uses an LC self-oscillator structure to encode high-level signals into single-ended output oscillation signals with the common-mode point as ground. The decoding circuit adopts RC low-pass filtering to further filter common-mode transient noise signals and restores the oscillation signals to digital signals through a comparator. Simulation results show that the input signal speed of the codec circuit can reach 120 Mb/s, the differential oscillation signal frequency is 850 MHz, and the typical transmission delay is 8 ns. Applied in a certain isolated driver chip, the measured CMTI can reach up to 200 kV/μs.
Key word:
magnetic isolation circuit
high CMTI
on-off keying (OOK)

Design of a high-speed large-capacity storage system based on NAND Flash

DOI:10.16157/j.issn.0258-7998.257349

Author:Hu Jiafu1,2,Zhang Xuxin1,2,Zhao Fuhai1,2,Wu Xiayi1,2,Liu Jian1,2

Author Affilications:1.Aerospace Information Research Institute, Chinese Academy of Sciences;2.School of Electronic, Electrical and Communication Engineering, University of Chinese Academy of Sciences

Abstract:With the rapid development of digital information technology, traditional storage media can no longer meet the demands of modern applications for high-speed and large-capacity data storage. This paper presents a high-speed, large-capacity storage system based on NAND Flash. By employing a multi-channel parallel architecture and pipeline management technology, the system effectively improves both throughput and reliability. Experimental results demonstrate that the high-speed storage system operates stably, enabling high-speed recording of large volumes of raw data while ensuring real-time data recording.
Key word:
NAND Flash
FPGA
high-speed large-capacity storage
pipeline management
bad block management

Design of an iterative approximate logarithmic multiplier for neural networks

DOI:10.16157/j.issn.0258-7998.257386

Author:Yin Peipei

Author Affilications:Department of Information Technology, Nanjing University of Aeronautics and Astronautics

Abstract:As an important branch of machine learning, neural networks have a wide range of computing scenarios. However, the complex model algorithms and large datasets pose significant challenges to system hardware. Due to the inherent tolerance of neural networks to errors, approximate computing technology has become a reasonable and efficient strategy. In this paper, by combining the Mitchell algorithm, a multi-precision approximate logarithmic multiplier is designed through operand approximation, error compensation, and iterative processing. Under similar error conditions, compared with traditional non-iterative and iterative logarithmic multipliers, it can reduce the PDP by 54.07% and 39.49%, respectively. By applying approximate computing to the convolution layer and fully connected layer in neural networks, the experimental results show that the approximate multipliers DR-IALM-7, DR-IALM-6, and DR-IALM-5 have classification accuracies similar to the exact multiplier when used in LeNet-5. The experiments demonstrate that applying approximate computing with appropriate precision to neural networks can effectively reduce system hardware power consumption while maintaining network accuracy.
Key word:
neural network
approximate computing
approximate logarithmic multiplier
network accuracy
hardware power consumption

Radar and Navigation

Analysis of high-resolution SAR characteristics in lunar orbit and imaging correction method

DOI:10.16157/j.issn.0258-7998.267760

Author:Wei Dongxu1,2,Wei Baoyuan1,2,Liu Yabo1,Zhan Xianlang1,2,Yu Zhongjun1

Author Affilications:1.Aerospace Information Research Institute, Chinese Academy of Sciences;2.School of Electronic , Electrical and Communication Engineering, University of Chinese Academy of Sciences

Abstract:High-resolution lunar synthetic aperture radar (SAR) imaging is constrained by limited navigation accuracy and incomplete prior topographic information, which makes motion errors and terrain errors prone to coupling and thus causes image defocusing. To address this problem, and based on an analysis of the tracking capability of the deep-space measurement and control network, this paper focuses on lunar orbital SAR establishes an imaging geometry and error propagation model that combines orbit measurement data with a lunar digital elevation model (DEM). This model is used to quantitatively characterize the impact and tolerance of velocity errors and height errors on the imaging phase. On this basis, a two-dimensional space-variant error correction method is proposed. First, an equivalent velocity is estimated by an image-entropy-minimization autofocus criterion; then, DEM-based subaperture terrain phase compensation is applied to suppress the residual space-variant phase. Simulation data processing produces point-target and distributed-target images under injected velocity and height errors, demonstrating the effectiveness of the proposed two-dimensional space-variant error correction procedure and its ability to mitigate motion–terrain coupled errors. Furthermore, compared with uncorrected results, the proposed method clearly improves the peak sidelobe ratio and integrated sidelobe ratio of point targets, while the image entropy in representative distributed-target regions is effectively reduced by 0.116, 0.154, and 0.203 bit in the L-, Ku-, and Ka-band cases, respectively.
Key word:
lunar synthetic aperture radar
two-dimensional space-variant error correction
entropy-minimization autofocus
subaperture terrain phase correction

Research on robot multimodal autonomous navigation technology for complex scenarios

DOI:10.16157/j.issn.0258-7998.257474

Author:Fu Ling1,Liu Mengqi1,Wang Fan1,Li Qingming2,Wu Xucheng1

Author Affilications:1.Department of Public Security of Zhejiang Provincial;2.Zhejiang University

Abstract:Aiming at the challenges faced by wheeled-legged quadrupeds in highly dynamic and unstructured environments—such as poor environmental adaptability, low efficiency in multi-module collaboration, and motion instability caused by dynamic loads—this study investigates a comprehensive integrated testing and verification system. The system constructs a multi-engine collaborative digital twin platform with bidirectional physical-virtual interaction, providing a high-fidelity simulation environment for algorithm training and validation. By incorporating the Time-Sensitive Networking (TSN) protocol, it achieves sub-millisecond high-precision synchronization of multi-source heterogeneous data streams. Additionally, a dynamic load compensation strategy based on deep reinforcement learning (DRL) is proposed to adaptively adjust the robot’s motion control under varying load conditions. Simulation results demonstrate that the proposed method effectively enhances task execution efficiency and reliability in extreme working conditions, offering core technical support for applications in the field of public safety.
Key word:
wheel-legged quadruped robot
autonomous navigition
unknown enviroment
emergency rescue

Industrial Computer Conference of China 2025

Lightweight underwater image enhancement system based on terminal processor

DOI:10.16157/j.issn.0258-7998.267750

Author:Li Shiyan1,2,3,Han Huajin1,2,3,Mao Heng1,2,3,Ma Baiwei1,2,3,Guo Yuanhan1,2,3

Author Affilications:1.Tianjin Navigation Instruments Research Institute;2.Tianjin Qisuo Precision Electromechanical Technology Co., Ltd.;3.Tianjin Key Laboratory of Special Severe Environment Computer

Abstract:Aiming at the problems of color distortion, low contrast and blurred details in underwater images, and the computational constraints faced by existing deep learning models in the deployment of edge devices, this paper proposes a lightweight underwater image enhancement system based on terminal processor. The core of the system is an end-to-end ultra-lightweight neural network with only 3.4k parameters, which is suitable for images with any resolution. When processing underwater images, it can not only maintain the content style and spatial texture, but also improve the image color performance. Experiments show that the peak signal-to-noise ratio (PSNR) and structural similarity index (SSIM) of the system reach 23.137 dB and 0.918 on the standard UIEB data set, and the optimal deployment of the model is realized on Huawei Ascend processor, and the reasoning speed reaches 25.756 fps, which meets the real-time processing requirements of underwater machine vision terminals.
Key word:
underwater image enhancement
edge computing
model optimization and deployment

Research on key technologies of mesh modeling and hybrid computing for major and complex engineering projects

DOI:10.16157/j.issn.0258-7998.267805

Author:Wei Zhiyun1,2,Sun Yaozong3,Yang Fan1,2,Yuan Jianping1,2,Zheng Bo1,2,Xu Zhen1,2,Yang Liguo1,2,Wang Peng3,Sun Yuan2,Shi Jinchen2

Author Affilications:1.Digital Engineering Research Institute, PowerChina Huadong Engineering Co.,Ltd.;2.Zhejiang Huadong Engineering Digital Technology Co.,Ltd.;3.Glodon Company Limited

Abstract:In the digital construction process of major and complex projects, high-precision modeling of large-scale scenes and multi-scale coupled computing have long been confronted with key technical bottlenecks such as low modeling efficiency, poor robustness of Boolean operations, and difficulty in ensuring geometric-topological consistency. To address these challenges, this paper developed CyberMesh, a mesh modeling and hybrid computing component with complete independent intellectual property rights, which covers seven major modules including mesh modeling, mesh computing, mesh editing, and mesh optimization etc. It has proposed six core technologies, including complex mesh modeling, fast ray intersection, highly robust autonomous shearing, and mesh-solid model fusion etc. By constructing a hybrid expression data structure, CyberMesh has achieved a unified expression of geometric accuracy and topological connectivity, supporting the efficient generation of tens of millions of meshes and millimeter-level accuracy control. After benchmarking and verification through Boolean operations, ray intersection, and discrete modeling, it has reached or even surpassed the equivalent level of international mainstream commercial software in terms of operational efficiency and robustness. The research results are oriented towards major and complex infrastructure projects such as water conservancy and hydropower, offshore wind power, highways, bridges, and mines, focusing on the core technical demands throughout the entire life cycle of digital design, construction, and operation and maintenance, providing strong support for achieving breakthroughs in the infrastructure field.
Key word:
major and complex projects
mesh modeling
hybrid computing
CyberMesh

High Performance Computing

Innovative Microwave and Antenna Technologies

Industrial Software Driven by Digital-Intelligent Technology

Low-Altitude Technology and Engineering

Key Technologies of 5G-A and 6G

High Performance Computing

Analysis and Application of Marine Target Characteristics

FPGA and Artificial Intelligence

Key Radio Frequency Technologies in Radio Transceiver

Industrial Software and New Quality Productive Forces

5G-Advanced and 6G

High Speed Wired Communication Chip

Information Flow and Energy Flow in Industrial Digital Transformation

Special Antenna and Radio Frequency Front End

Radar Target Tracking Technology

Key Technologies of 5G-A and 6G

Key Technologies of 5G and Its Evolution

Key Technologies of 5G and Its Evolution

Processing and Application of Marine Target Characteristic Data

Smart Power

Antenna Technology and Its Applications

5G-Advanced and 6G

Smart Agriculture

5G Vertical Industry Application

Microelectronics in Medical and Healthcare

Application of Edge Computing in IIoT

Key Technologies for 6G

Deep Learning and Image Recognization

6G Microwave Millimeter-wave Technology

Radar Processing Technology and Evaluation

Space-Ground Integrated Technology

Industrial Ethernet Network

5G Vertical Industry Application

FPGA and Artificial Intelligence

Innovation and Application of PKS System

5G Network Construction and Optimization

RF and Microwave

Edge Computing

Network and Business Requirements for 6G

5G and Intelligent Transportation

5G R16 Core Network Evolution Technology

Satellite Nevigation Technology

5G R16 Evolution Technology

5G Wireless Network Evolution Technology

5G Network Planning Technology

5G Indoor Coverage Technology

5G MEC and Its Applications

5G Co-construction and Sharing Technology

Expert Forum

5G and Emergency Communication

5G Slicing Technology and Its Applications

Industrial Internet

5G Terminal Key Realization Technology

5G and Artificial Intelligence

5G and Internet of Vehicles

Terahertz Technology and Its Application

Signal and Information Processing

Artificial Intelligence

5G Communication

Internet of Things and the Industrial Big Data

Electronic Techniques of UAV System

Power Electronic Technology

Medical Electronics

Aerospace Electronic Technology

Robot and Industrial Automation

ADAS Technique and Its Implementation

Heterogeneous Computing

2016 IEEE International Conference on Integrated Circuits and Microsystems

ARINC859 Bus Technology

FC Network Technology

Measurement and Control Technology of Bus Network

GJB288A Bus

Key Techniques of 5G and Algorthm Implement

IEEE-1394 Bus

Signal Conditioning Technology of Sensors

AFDX Network Technology

Discrete Signal Processing

Energy-Efficient Computing

Motor control

2012 Altera Electronic Design Article Contest