Abstract：AFDX network meets the requirement of new generation avionics system，which has high real time capability, high-reliability and high-band width. The core protocol of AFDX network is ARINC664 Part7. The protocol has the fully system structure, the use of virtual link technology meets the requirements of high real time capability for the AFDX network, the redundant fault-tolerant mechanism is used to realize the high-reliability of AFDX network. This thesis analyzes end system and switch protocol in detail on the base of summarizing the AFDX network. The switch protocol includes key technology such as the police tube, filter and exchange of scheduling. It is the theoretics base for the design of AFDX network key protocol SoC and products.

Abstract：Aviation full duplex switched Ethernet(AFDX) uses commercial off-the-shelf(COTS) technology and open standards which on the basis of the traditional Ethernet, it is a kind of large and medium-sized aircraft integrated avionics system of interconnected communication star network, and becoming the best choice for the next generation of aviation data network. AFDX network makes use of robust, mature, high-speed commercial IEEE802.3 Ethernet standard communication principle and network structure which uses key technology such as full duplex, double redundancy fixed bandwidth allocation, virtual link, the redundancy management and integrity check in order to satisfy the avionics systems for high-bandwidth, low-latency, high-security, high-reliability, strong real time, deterministic communications service requirements. This paper further understands AFDX network background, analyzes the AFDX network topological structure, working principle and network features in detail, and illustrates the further development trend of AFDX network. All of this paper′s research is important for subsequent AFDX network research and engineering applications.

Abstract：Avionics Full Duplex Switched Ethernet(AFDX) end system core chip and technology are the key and foundation of realizing AFDX network communication. It is widely used in aviation field of network communication and control system. Based on the deeply analysis AFDX network bus protocol and communication mechanism, this paper provides a solution of AFDX End-system chip, and elaborates the End-system architecture, working principle and technical advantages. The AFDX network End-system SoC chip meets the design reguirements of miniaturization and low power consumption of the aviation system. The chip contains ARM922T processor, AFDX protocol processing terminal, double redundancy 10/100M AFDX MAC port and high-performance data transmission PCI bus based on DMA，and realizes the UDP/IP protocol stack on chip. The End-system SoC chip provides high-speed Internet for large aircraft airborne equipment terminal system.

Abstract：Because of monopolizing AFDX network core products, which seriously restricts the internal development of AFDX network technology. At the same time, the establishment of AFDX network product system integrity is a laborious effort. This paper provides the method of the module design of AFDX network end system chip. The end system module′s design and implementation process are based on combining of hardware and software. This module is embedded with end system SoC chip and provides PMC, PCI and CPCI host interface that it implements the AFDX network data communications. This product has been successfully used in the model project. It has many advantages, such as low power consumption, stable and reliable function,high domestic rate and high maturity. It breaks the monopoly of foreign products and realizes autonomous protection and autonomous control of AFDX network end system module.

Abstract：The complexity of AFDX(Avionics Full Duplex Switched Ethernet) protocol and aviation bus layout makes it is particularly important to establish a complete ground simulation test system. A good network simulation system provides physical simulation and ground test for the key network components, it′s greatly reducing the construction cycle of network and the maintenance cost of the system. This paper introduces a kind of design scheme of AFDX network simulation system which is established mainly on the end system and the switch and assisted by AFDX network equipment such as simulation, monitor, load and management. It discusses the various components of the simulation system in detail. Users can evaluate and understand AFDX network communication mechanism, principle and application through this platform, thoroughly understand AFDX network data flow, operation mode and working principle of equipment. It is useful to help users location the problem and resolve trouble shouting through simulation function.

Abstract：Distributed power system(DPS) has been widely applied in many areas. However, there is no perfect theory analyzing method due to its complex nonlinearity. Several basic connection types of modules in DPS are introduced. The modeling approaches and nonlinear factors of DPS are fully analyzed and summarized, which laid the foundation for the analyzing characteristics of DPS with nonlinear methods.

Abstract：E-paper is the inevitable trend of handheld reading device of intelligence applications. The driven approach of EPD plays a decisive role in quality and speed of image update. A typical driving waveform is divided into three phases: the erase phase, active phase, reach the target gray. The industry's urgent need an effective method of an electrophoretic displays driving reduce the driving time and ghosting. Thereby taking into account the characteristics of particle motion, propose new drive method. The experimental results show that these two methods can reduce the driving time effectively and display while still maintaining high quality images.

Abstract：This paper presents a verification technology based on coverage-driven stimulus generation algorithm. A completed verification platform is given, and applied to a high frequency RFID(Radio Frequency Identification) chip successfully. The main idea of this technology is obtaining the boundary conditions and modifying the constraint of stimulus generation by analyzing function coverage and code coverage, and then using the new stimulus to verify the boundary conditions. So the coverage is up. After taping out, the verified chip by this verification platform was be tested. The test shows that all function are correct and performance is excellent.

Abstract：A dual mode control, anti distortion, ultra low EMI, internal integrated boost circuit is designed to realize the high volume output high efficiency audio power amplifier. The system can be used to control the amplifier’s work in the distortion mode or normal mode according to the size of the output signal, adjust the gain to achieve anti distortion function automatically. The circuit is realized by 0.5 μm CMOS CSMC process. The test results show that: under the condition of 5 V power supply voltage, load RL=8 ?赘+33 μH, the power amplifier can maintain the Total Harmonic Distortion+Noise(THD+N) in 0.2% with the input signal range from 0 V to 3.3 V, the largest output power is 2 W. The power amplifier can also provide 2 W output power when the lithium battery voltage drops which is suitable for the application of portable products.

Abstract：A design of DDC with variable bandwidth is proposed after researching the structure of traditional DDC, the mixer and decimation filters are mainly analyzed. Finally, a simulation of different signals based on Matlab and FPGA is given , the results indicate that this DDC architecture is correct and feasible.

Abstract：This article realized the automatic modeling and simulation of the circuit by programming，then to do some analysis of interconnect reliability based on the relationship with interconnect geometric size, current density， environmental temperature and AFD. The results show that with the decrease of temperature, current, size, the reliability of the interconnect power amplifier is downgraded. In order to guarantee the reliability design of the power amplifier, it is necessary to choose the appropriate size and working state for transistors. It also needs to weigh various indicators such as output power, gain, efficiency meanwhile.

Abstract：This paper presents a Ka-band high isolation SPDT(Single Pole Double Throw) switch using 0.13 μm CMOS process. The switch has a measured insertion loss of 2.7-3.7 dB and an input 1 dB compression power(P1 dB) of 8 dBm at 35 GHz. Via using the shunt NMOS topology and high quality factor match networks，33～51 dB measured isolation is obtained within the frequency range of 30～45 GHz. The switch core occupies only 160×180 μm2 chip area.

Abstract：Fiber Bragg grating(FBG) sensor which is a passive fiber parts, has been widely concerned because it has the dual functions: the sensing measures of the data and the network transmission function. The key technology of FBG sensor is wavelength demodulation in this paper, a set of FBG wavelength demodulation system has been designed and realized based on ARM and C#.Net. The system design includes hardware and software. Hardware system includes broadband light source, optical path system and circuit system. ARM is used to control hardware system for wavelength demodulation and data transmission. Software system is implemented based on C/S structure, which is very convenient for the communication between user and computer and can demodulate the wavelength exactly. At the same time, the software system can parse the wavelength as the actual physical quantities and store relevant data in the database.

Abstract：Now most of smart batteries provide SMBus protocol interface for user.In order to monitor the information of the battery,the paper analyzed the timing of SMBus protocol at first,and then simulated the protocol through MSP430 processor′s hardware interface,to read data from or write commands to the battery pack based on power management chip BQ3060. At last a smart battery information monitoring system was realized,which could monitor batteries′ capicity,temperature,voltage,current and other information in real time.

Abstract：For trawl applications in the marine environment monitoring, this paper designs a visual plankton trawl system, by using underwater lighting equipment with HD cameras and a laser optical plankton counter to collect image, video and plankton data. The system uses Gigabit Ethernet, fiber-optic network and TCP/IP protocol for sending real-time transmission of data to the deck video surveillance platform that can receive, display, storage video, sensor data, and control the devices working status. The system owns HD cameras and Gigabit Ethernet communications architecture so that it can be used to achieve high-quality video display, as well as laser optical plankton counter achieves real-time data acquisition, so as to achieve convenient and fast performance.

Abstract：A new system architecture of streaming media traffic generator based on Tilera many-core platform is proposed, it includes module about system interface of management, service loading module and traffic module about streaming media. This system takes advantage of the powerful parallel processing ability and efficient network throughput features of Tilera platform, combined with user behavior of streaming media and parallel technology on Multi-core. After a large number of tests,it proved that the system could generate enough streaming traffic and number of concurrent users under different scenarios, at the same time, the network traffic generated by this system is more real . And the system could provide better support for the study of scientific research personnel about the testing of network equipment performance and evaluation of network protocols,etc.

Abstract：By applying TMS320F28335 DSP as the core controller, the design scheme of the control system of three-phase 8 pole brushless DC motor was given. The main hardware circuit and software were designed in detail, and the corresponding circuit schematic diagram and program flow chart were given. The speed adjusting algorithm adopts improved single neuron adaptive PID control algorithm. Through adaptive adjustment of control parameters, the adaptability to the environment control system was improved. The experiment showed that: the design of brushless DC motor control system is feasible with the improved single neuron adaptive PID control algorithm, the response time of the brushless DC motor was shorter, overshoot and the curve of speed wave were smaller.

Abstract：In order to provide an important environmental data to the performance of the satellite navigation receiver, the device of collecting and storing the signal of the real navigation satellites is designed. The system takes FPGA+ARM as the core chip, and integrates RF down-conversion circuit, high speed A/D converter and high speed data storage model. These modules constitute a dual sampling channel, high sampling storage rate, strong portability and other characteristics of the satellite navigation signal acquisition and storage system. On the complete hardware platform, through the test of the actual signal of the on orbit satellite, the data of the signal acquisition and storage system is verified, and the expected design requirements are achieved.

Abstract：Aiming at the problem of PCM telemetry analog source for single output signal and non-adjustable parameters, this paper proposes a PCM signal source design of multi-channel waveform output adjustable. This design takes FPGA as the logic control chip, and makes full use of its flexibility, internal resources and features. On the basis of a brief description of the signal source design solutions and the hardware circuit, it mainly introduced the communication protocol and software implementation method. Finally, the signal source is tested in many aspects. The test results show that the signal source can achieve the function of 1 024 arbitrary channel output waveform adjustable, and supports 8 bit and 16 bit word length.

Abstract：In view of the high cost and low precision of the current high sample rate ADC, this paper puts forward the signal frequency estimation method based on under-sampled signal, combining low speed ADC, and the sampling effect of high speed ADC can be achieved. Verified by the simulation especially sampling and frequency estimation the signal of 31 351 Hz combining the 50 kHz ADC with one 20 kHz ADC and one 30 kHz AD, results show that the deviation is only 0.01 Hz, and correctness of the method is proposed. Lastly, the method is implemented and tested on Zynq, and test results show that this method has a high precision which can meet the requirement.

Abstract：With the continuous integration of industrial and information system, more and more industrial control systems have been connected to the Internet or Enterprise management network. Since industrial control systems have very high requirement for system sampling time, the performance of those systems could be significant difference with the various sampling time. It could not be employed to detect the distribute denial of service(DDoS) attack by using the traditional DDoS detection methods which consume too much computation power. In this work, an extended Kalman filtering with model-based algorithm parameters is used to identify control systems′ DDoS attacks. In order to test the performance of the proposed method, the numerical simulation and practical experiments have been carried out. The experimental result shows that the proposed algorithm can effectively identify DDoS attacks against specific industrial control systems network.

Abstract：Airborne Doppler radar echo orthogonal two-way signal data is large and the transmission rate is high.The airborne environment is complex and if there is a crash, the storage device will be subjected to a high impact, and the shell is very easy to deform and the data will loss. The traditional bus type control data recorder is of small storage capacity, slow transmission rate, and can not afford to drop impact. To solve these problems, this paper designs a dual channel radar echo storage system based on hardware control. It can store two channels of 128 GB data. The storage rate can reach 160 MB/s, and a reasonable mechanical structure design is proposed. The two level buffer protection is designed. The experimental results show that the system can be effectively used to read the data under high impact and bad environment.

Abstract：A visualized heart sounds acquisition system is designed to improve the accuracy of heart sounds auscultation of doctor. Heart sound signal is acquired, amplified and filtered by PSoC4 chip. Real-time auscultation is implemented by an audio power amplifier module. A digital filter is designed by software to filter interference signals. The processed heart sound data is wirelessly transmitted to the PC for waveform display and storage via a bluetooth module. Heart sounds data of nine normal male adults are collected for clinical feasibility tests, and analyzed and discussed in the MATLAB platform. Experimental results show that the system is low cost, small volume, not only can realize analog and digital processing of heart sounds on a single chip, but also can reflect time-domain features of heart sounds in the upper machine，laying a good foundation for subsequent heart sounds research in data analysis and intelligent diagnosis.

Abstract：In the process of trenchless horizontal roof drilling work, ground operators need to follow a bit forward and backward on foot, other top drill the car need to be a pilot devices inside the vehicle. To reduce labor costs, the operator carries the wireless control device, the top rig car fixes wireless receiving controller circuit, and with the use of the Internet of Things technology，trenchless rig is on the control remotely，which can save a driver. Wireless control device through the button switch input switch quantity control signal, through the input analog control signal, spherical knob by wireless module converts analog signals into corresponding digital signals. Wireless receiving controller after receiving the switch signals and digital signals, the digital signal back to analog signals, with digital and analog signals to control in-vehicle device control function, circuit with high and low temperature testing and running 1 truck during one year, the result proved the feasibility of the above conclusion.

Abstract：Network coding is an emerging technique known to improve the network performance in many aspects. In Vehicular Ad-hoc Networks(VANET), the bandwidth is considered to be one of the most important network resources. This paper proposes a network coding technique to improve the bandwidth utilization for non-safety applications in VANET. In a scenario where there are two sources broadcasting the data into the same area at the same time, the relay will use the network coding technique to decrease the number of rebroadcasting events and the consumption of the bandwidth. However, a fundamental problem for the relay when it receives a packet, is whether to wait for a coding opportunity and save the bandwidth or send the packet directly and reduce the delay. In order to address such tradeoff, we introduce two versions of our protocol, named buffer size control scheme(BSCS) and time control scheme(TCS). By both versions we aim to control the delay that is experienced by the packet at each hop, while achieving better bandwidth utilization. Up to 38% improvement in the bandwidth utilization has been recorded, and both schemes have shown a considerable amount of control on the imposed delay.

Abstract：The existing anti-collision algorithms for RFID reader can only resolve some types of reader collisions, or it has high delay due to adopting centralized control hardware, a distributed anti method for all types of RFID reader collision is proposed for that problem. A distributed multi-channel notification protocol is designed, which includes two parts of interrogation and receive, and the network resource for the readers is distributed reasonably. All types of collisions are considered by the proposal and the average tag interrogation delay of all tags are reduced. Simulation experiments results show that the proposal can handle all types of collisions and realize a lower delay.

Abstract：Combined GPS/GLONASS PPP method is used to monitor how haze weather affect zenith tropospheric delay in recent years in the Beijing area.Studies have shown that during the haze weather, zenith tropospheric delay increased obviously, the change trend of zenith tropospheric delay is consistent with the change trend of haze weather.Conbined with the characteristics of Beijing′s haze weather,daily movements of haze is consistent with changes of zenith tropospheric delay.Using combined GPS/GLONASS PPP method to monior the impact of haze weather on zenith tropospheric delay is possible.

Abstract：In Vehicle Ad hoc Networks(VANETs)，Vehicle-to-Vehicle(V2V) communication is able to transmit emergency message. Therefore，NCFMB protocol is proposed in this paper. In NCFMB, firstly, the distance between nodes, direction and local density are used to compute the contention weight of nodes. The node with max contention weight is considered to be forwarding node. Secondly, the data is encoded before broadcasting the data in order to improve the data transmission ratio. Finally, the simulation results show that proposed NCFMB protocol performs 10% better than FUZZBR protocol in terms of data transmission ratio, and about 50% in term of end-to-end delay.

Abstract：In order to decrease the frame packet lost rate in 802.15.4 network, this paper analyzed the packet lost rate based on the retransmission mechanism, proposed the mathematical model for the working process of network node in MAC layer, and derived the steady-state probability of the main state. Afterwards, this paper carried out the mathematical analysis for the retransmission probability and the packet lost rate. Finally, the effect of MAC layer parameters minBE, NB and network environment parameter λ、N、BER on the retransmission probability and the packet loss rate was compared through the experimental analysis. Experimental results show that the node packet loss rate is reduced by 88.9%, compared with the data transmission performance without retransmission mechanism. And the model could accurately reflect the node data transmission characteristics. Furthermore, equilibrium parameter deployment could effectively improve the data transmission success rate, and theoretical research could provide the reference for 802.15.4 network standard.

Abstract：In order to validate the DSP algorithm of power electronic control system and improve the development efficiency,this paper puts forward the co-simulation based on CCS and MATLAB/Simulink. This paper introduces the basic principle of co-simulation and gives the construction and implementation of co-simulation platform. The key steps of compilation of CCS IDE script file and S_Function based on Level-2 are also given. Finally, the Hybrid Solid State Switch(HSSS) model was constructed under Simulink, and the basic functions of HSSS were realized through co-simulation, which verified the validity of the scheme.

Abstract：This paper describes a GPU-accelerated implementation of adaptive image de-mosaicking (a common digital image processing application) to demonstrate massive computation power of the many-core architecture. Acceleration strategies are briefly described to properly map the real-world applications to the GPU for high performance computing. Experimental results show that the developed OpenCL implementation can leverage the AMD FirePro W8100, which achieves a high throughput rate up to 100 frames/s, each having 1920-by-1080 pixels with RGB values. This research work integrates this GPU processor and the AMD Bald Eagle(an embedded APU processor) to form a heterogeneous computing platform, and uses this acceleration example as a case study to demonstrate that heterogeneous system architecture is well-suited for high-throughput, high-definition applications in many fields, such as security and medical imaging.

Abstract：For Cluster-tree algorithm only relays on parent-child relationship to rout in ZigBee wireless network and the limited bandwidth of ZigBee technology will result in that the heavily loaded link can′t timely transmit information and so prone to network congestion, packet loss and lower network throughput problem，this paper proposes an optimization algorithm, the Z-DMHCTR algorithm, which combines with neighbor list among the nodes to find a node disjoint paths with the original path to transmit information，thereby improving network bandwidth utilization and increasing the network throughput. Through the simulation, this paper compares the difference of improved algorithm and the original algorithm in the network throughput, end data transmission delay and other aspects of difference. The result shows that the improved algorithm effectively improves the network throughput, and reduces the time delay of data transmission simultaneously.

Abstract：The security of steganographic technology is the most importance limitation of information hiding, and there is a lot of promotion on the security of the scheme based on image or video carries. This paper proposes a security steganography method in Tetris game based on the core principle of extend information hiding. At first, it expound how the proposed method work in Tetris game. Then a complete scheme of covert communication is proposed which utilizes the method at the same time. Theoretical analysis proves that it reaches S1 safety. The experiment result shows its safe and its embedding capacity enhanced.

Abstract：In order to improve the overall performance of phase-shift full bridge converter in high power applications, the scheme is proposed by using double current rectifier circuit and saturated resonant inductance, increasing the DC blocking capacitor and diode clamp circuit to reliaze the miniaturization, high efficient and high reliability, etc. Considering the mutual influence of the various factors, the main circuit parameters are designed in detail. A 24 V/600 W, 50 kHz prototype is developed. The experimental results show that the converter reaches soft switch at 20% load, the output voltage ripple is less than 0.5%, the efficiency up to 80% at 20% load, the efficiency up to 90% at 60% or more load, which proves the feasibility of the design.

Abstract：The reason that the avalanche energy value in the power MOSFET datasheet is not effective is given in this pare at first. The variation of the avalanche energy value with different used inductance and waveforms are presented. The characteristic of the avalanche energy of power MOSFET and the cause at the different inductance are also discussed based on their de-capped failure analysis. The worst condition of power MOSFET avalanche that the power MOSFET is turned off very fast with very huge current and at very small inductance is given in the end.

Abstract：An isolated SEPIC is studied in this paper. The structure can realize the electrical isolation compared to the basic SEPIC topology. The converter has the input structure like Boost. It can cut down the input current ripple and achieve high power factor. The converter is suitable for LED driver with PFC or new energy power supply system. In this paper, operation principle is analyzed in detail with the consideration of leakage inductor; voltage stress is calculated in this situation; winding structure of the transform is introduced. Three leakage inductor power absorption circuits are compared and one of them is designed. At last, a 200 W prototype is built to verify the analysis result.

Abstract：The wireless power transmission is a new way of energy transmission. According to the problem of high-frequency energy conversion in the wireless power transmission, the high-frequency transformer of ATmega64 microcontroller as the core is designed. Firstly, combined the characteristics of the wireless power transmission, the main circuit and the control circuit which included the driving circuit, the sampling circuit, protection circuit are designed. Then, based on the PWM control technology, the instantaneous dual-loop control strategy with outer voltage and inner capacitor current is proposed. And the correctness of the method is verified by simulation. Finally, through the development of the prototype, the effectiveness of the frequency transformer is verified. The design of frequency transformer has the core technology of wireless power transmission, which have many advantages such as good stability, low loss, high reliability.