2017 No. 12

Publish Date:2017-12-06
ISSN:0258-7998
CN:11-2305/TN
Prev

Review and Comment

Study on the technique of scalp EEG acquisition

DOI:10.16157/j.issn.0258-7998.172215

Author:Zhang Fahua,Shu Lin,Xing Xiaofen

Author Affilications:School of Electronics and Information,South China University of Technology,Guangzhou 510641,China

Abstract:EEG signals reflect the health status and cognitive activity of the human brain, which is an important parameter in brain disease diagnosis and treatment, as well as cognitive neuroscience. EEG monitoring is also an important method in the field of brain-computer interface. The scalp EEG acquisition technology exhibits non-invasive advantages when compared with intracranial EEG acquisition technology, and the advantage of providing multi-channel and multi-brain area monitoring functions when compared to the forehead EEG acquisition technology, therefore is widely used. However, hair on the scalp affects EEG acquisition performance, thereby the application of the scalp EEG acquisition technology is limited. This paper presents a survey on the EEG electrode devices and wearable systems of the scalp EEG acquisition technology, together with an analysis of the progress of both scientific research and industrialization in this field. The future development directions of the scalp EEG acquisition technology have been discussed from the aspects of new materials, advanced structure and processing, and system integration. This study might show a guidance value and reference significance for the development of scalp EEG acquisition technology.
Key word:
scalp EEG
semi-dry electrode
dry electrode
active electrode
wearable

Microelectronic Technology

Design and implementation of multi-mode digital matched filter based on FPGA

DOI:10.16157/j.issn.0258-7998.171958

Author:Lin Xin

Author Affilications:School of Information and Electron,Beijing Institute of Technology,Beijing 100089,China

Abstract:The digital matched filter(DMF) is the critical component of direct sequence spread spectrum(DSSS) communication system. Designing it based on FPGA can gain higher system performance. Firstly,the principle of digital matched filter is introduced, and then the design principle of multi-mode digital matched filter is expounded that integration of a variety of modes on the receiving end of the same direct sequence spread spectrum communication system for despreading of spread spectrum signals with multiple spread-spectrum ratios improves the performance of communication system. On this basis, the effectiveness is verified by MATLAB simulation. Implementation and results based on FPGA are given at last.
Key word:
DMF
DSSS
multi-mode
FPGA

The method of standard chip unit connectivity detection

DOI:10.16157/j.issn.0258-7998.174416

Author:Liu Miao

Author Affilications:Cadence System Design Inc.,Shanghai 201204,China

Abstract:This paper presents a method for detecting the connectivity of standard chip units. This method can effectively detect the connectivity of the standard chip unit, improve the layout of the standard cell before the place and routing, or enhance the constraints of the place and routing, so as to ensure the design of the standard chip unit is friendly to place and routing. Through the detection and improvement of the standard chip unit, it can effectively improve the overall connectivity of the chip, then the turnaround time of place and route stage can be saved, the development cycle can be reduced and the chip yield can be improved. This method can realize the full coverage detection of the standard chip cell library. Through the algorithm optimization, more than 90% of the random scenario can be realized under the premise of minimizing the workload of the chip test. This method effectively captures the connectivity of standard chip units through the application of standard chip unit detection in different technology nodes. It improves or discards unfriendly scenarios that may occur before the digital back-end place and routing, and improves the efficiency of the chip back-end design.
Key word:
standard IC cell
cell pin
pin connectivity
net list
layout
place and routing

Hardware implementation of parallel-to-serial circuit based on FPGA

DOI:10.16157/j.issn.0258-7998.172005

Author:Liu Yan,Zhou Shengze,Luo Jun,Wang Xiaoqiang,Luo Hongwei

Author Affilications:China Electronic Product Reliability and Environmental Testing Research Institute,Guangzhou 510610,China

Abstract:Parallel-to-serial circuit has a wide application in communication interfaces. Field programmable gate array(FPGA) is very suitable for hardware implementation of parallel-to-serial circuit for its flexible and programmable. To find the best trade-off of cost and performance of hardware circuit, the methods of shift register, counter and judgment of combinational condition are implemented and compared. Functional verification and performance evaluation are completed based on FPGA. Experiment result has shown that the highest speed can be obtained by the method of shift register, and the best trade-off can be achieved by the method of counter. Besides, lowest registers can be consumed by using the method of combinational judgment. It relies on the application requirement to choose the best hardware architecture.
Key word:
field programmable gate array
parallel-to-serial circuit
hardware implementation
shift register
counter

Design of high-frequency digital decimation filter

DOI:10.16157/j.issn.0258-7998.171981

Author:Yang Fang,Fu Weiting,Qin Tiankai,Gao Qingyun

Author Affilications:College of Electronic Information and Optical Engineering, Nankai University, Tianjin 300350, China

Abstract:The paper designs a high-frequency digital decimation filter with a sample rate as high as 640 MHz and a decimation factor of ‘64’. This digital decimation filter consists of CIC filter, CIC compensator filter and half-band filter. The CIC filter uses structure of two stages for operating in high frequency. The first stage adopts polyphase decomposition to decrease the operating frequency so that the power consumption can be reduced significantly, and the second stage uses traditional structure. The CIC compensation part achieves a flat passband and the half-band filter meets the demand of stopband attenuation. In order to verify the performance of digital decimation filter, the paper designs a four stage feed forward-feedback ΣΔmodulator as the input of digital decimation filter. Under an input signal frequency of 0.5 MHz, SNR is 97.40 dB at last.
Key word:
ΣΔmodulator
digital decimation filter
CIC filter

Research on verification method of signal clock domain crossing transmission based on SOC

DOI:10.16157/j.issn.0258-7998.172154

Author:Wang Peng1,You Ran2,Liu Xuhong2,Fan Yuyang1,Tian Yi1

Author Affilications:1.Tianjin Key Laboratory for Civil Aircraft Airworthiness and Maintenance,Civil Aircraft Airworthiness Certification Technology and Management Research Center,Civil Aviation University of China,Tianjin 300300,China; 2.Airworthiness College,Civil Aviation University of China,Tianjin 300300,China

Abstract:When SoC signal across the clock domain transmission,there will cause metastable and other issues. So far, there is no complete and generic authentication method for signal CDC transmission. Therefore, this paper based on the traditional SoC design and verification of simulation tools, creat a set of verification of signal CDC. These include CDC structural analysis, CDC protocol verification based on assertion and metastable analysis. Through this set of methods can find the design of the initial defects in the design to improve the reliability of the design.
Key word:
metastability
CDC
verification

Spurious suppression and realization of sine signal source based on DDS technology

DOI:10.16157/j.issn.0258-7998.171974

Author:Kang Kai,Yan Yuanhai,Hu Zemin,Shi Hongsheng

Author Affilications:National Active Distribution Network Technology Research Center,Beijing Jiaotong University,Beijing 100044,China

Abstract:According to the operating principle of direct digital frequency synthesis(DDS), this paper builds system simulation models to output sinusoidal signal in simulink software. In this model, two different methods of compressing ROM query table data volume are used to suppress spurious waves and the combination of these two compression methods makes the compression ratio down to 1: 42.67, effectively reducing the size of the query table and the occupation of DDS resources. On the other hand, based on DDS chip AD9851 and AT89S52 single chip microcomputer,this paper proposes a design scheme of sinusoidal signal source and also presents the relevant hardware interface and software program. After the test on the actual PCB board, we have successfully output the 1 Hz~50 MHz sine signal and the source of which can be used in different high frequency fields.
Key word:
DDS
simulink simulation
spurious suppression
AD9851

Embedded Technology

Prediction of electric vehicle remainder range based on optimized OCV with STM32

DOI:10.16157/j.issn.0258-7998.172168

Author:Chen Dehai,Ren Yongchang,Hua Ming,Huang Yanguo

Author Affilications:School of Electrical Engineering and Automation,Jiangxi University of Science and Technology,Ganzhou 341000,China

Abstract:The accurate real-time prediction of the remainder range of the pure electric vehicle is one of the important fields in the research of the power battery energy management system(BMS). In this paper,to solve the prediction difficulties of the large error, poor adaptability and complex mathematical modeling ,the OCV is only used to predict the initial SOC value. When the standing time of the battery is long enough and its SOC is large, and the standard range SN and the standard capacity SOCN are updated in time with self-adaptability to eliminate the accumulated error. Then, the slope parameters and the non-essential energy consumption equipment capacity parameters are transformed into the range parameters under the standard SN. Finally, the optimized OCV mathematical model is established and the STM32 hardware hardware circuit is designed to predict the remainder range. It is tested by the pure electric vehicle EV-1 and the test values are recorded to compared with the predicted values. The results show that the maximum relative error is 5.2%, which is obviously improved compared with the other current methods.
Key word:
power battery
BMS
remainder range
optimized OCV
STM32

Design and implementation of the robotic arm control system based on K64

DOI:10.16157/j.issn.0258-7998.172276

Author:Ding Wei,Wang Yihuai,Jia Rongyuan

Author Affilications:School of Computer and Technology,Soochow University,Suzhou 215000,China

Abstract:Robotic arm is widely used,which combines with different tools to accomplish specific functions. The rational use of robotic arms can greatly liberate manpower, replacing people to complete some repetitive and boring or dangerous work. A special embedded control system is proposed for the self-designed three-degree-of-freedom robotic arm. The control system uses K64 as the core control board, MQX_Lite for the operating system, through communication with the computer, parsing the relevant command and calculating the corresponding joint rotation angle with multi-task concurrent execution. At the same time, through the experiment, the system runs smoothly and efficiently,which has high application value.
Key word:
robotic arm
MQX_Lite
motion control
embedded system

Realization of the virtual floppy disk based on FPGA and ARM

DOI:10.16157/j.issn.0258-7998.171444

Author:Chen Zhangjin1,2,Chen Xudong1,Jiang Pengcheng1,Wang Wenlei1,Li Hanchao1

Author Affilications:1.Microelectronic Research and Development Center,Shanghai University,Shanghai 200072,China; 2.Computer Center,Shanghai University,Shanghai 200444,China

Abstract:An approach to virtualize an external memory device as a floppy disk based on FPGA and ARM is presented. This hardware system successfully implements parallel CRC computing, encodes/decodes MFM bit stream and accesses the SRAM as a 1.44 MB floppy disk, and implements image making, file read/write, formatting and making startup disk of this virtual floppy disk. ARM communicates with FPGA via SPI interface, and acts as a UDP server, and realizes reading/writing access to the status and data of the virtual floppy disk in the local area network.
Key word:
FPGA
ARM
virtual floppy disk
parallel CRC
MFM encode/decode
UDP

The design of photovoltaic junction box monitoring system based on 6LoWPAN

DOI:10.16157/j.issn.0258-7998.171702

Author:Zhang Yihao,Sun Dongmei,Shen Yucheng,Zeng Li

Author Affilications:School of Electrical Engineering and Control Science,Nanjing Tech University,Nanjing 211816,China

Abstract:In view of the shortcomings of traditional photovoltaic junction box monitoring system, such as complicated wiring, poor scalability, high cost and so on, this paper designs a photovoltaic junction box monitoring system based on 6LoWPAN wireless sensor network technology with the CC2530 of TI company as the core hardware platform,and develops the PC monitoring platform through the C#.NET and SQL Server 2008. The monitoring system has the advantages of free wiring, low cast, great human-computer interaction and so on. A network including 5 monitoring nodes, 1 border gateway and a PC server is created to evaluate the performance of the monitoring system, and the experiment result shows that the 6LoWPAN monitoring system achieves real-time monitoring and management of power parameters in junction box, whose reliability and stability can meet the requirements of photovoltaic junction box monitoring system, and has high application value.
Key word:
6LoWPAN
photovoltaic junction box monitor
Contiki
border router

Design of HDMI multi mode display module based on FPGA

DOI:10.16157/j.issn.0258-7998.171683

Author:Xiang Zihao,Lu Anjiang

Author Affilications:College of Big Data and Information Engineering,Guizhou University,Guiyang 550025,China

Abstract:Using SOPC to process video signal is a hot research at present. As for the display module of the system, the paper puts forward a kind of design, which contains multi mode display module and is based on FPGA. First,it analyses the timing sequence of HDMI driver and designs driving signal to create circuits. Then, according to the configuration parameters, mixes the multi-channel video together in the form of multistage ALPHA mixing, to realize the output and display of the multi video by HDMI, meanwhile the position and transparency of every video can be set. To assure the real-time of the video, for the more complicated calculating process, it designs the assembly line way to promote the speed. The module is written in the form of Verilog HDL, which has strong versatility.
Key word:
FPGA
multi mode display
HDMI
ALPHA mixing

Measurement Control Technology and Instruments

Design and application of wireless cable tension sensor in the structure monitoring system of bridges

DOI:10.16157/j.issn.0258-7998.172576

Author:Tang Tao1,2,Deng Yongjun3,Ye Huarong3,Li Ya2,Li Wenhua2,Wang Pengjun1,2,Deng Beixing2

Author Affilications:1.Department of Electronic Engineering,Tsinghua University,Beijing 100084,China; 2.Smartbow Information Technology Co.,Ltd.,Beijing 100085,China; 3.Bureau of Communications and Transportation,Luzhou 646000,China

Abstract:A wireless smart sensor is designed for cable tension monitoring system of bridges. The smart sensor possesses several technical features such as ultra-low power consumption, built-in fundamental frequency extraction algorithm and capability of wireless communication through the self-organized wireless sensor network. The stability and accuracy of our fundamental frequency extraction algorithm are verified in both experiments and long-term cable-stayed bridge monitoring applications. Thank to the well-designed hardware and software, the battery-powered sensor is able to keep on working for more than ten years. The wireless smart sensor proposed in this paper can largely cut down the complexity of the cable tension monitoring system construction and reduce the difficulty of data analysis. At the same time, the cost of maintenance can also be greatly depressed.
Key word:
wireless cable tension sensor
design of algorithms
structure monitoring

Phase discriminator with dynamic frequency division for eliminating nonlinearity at high frequency based on FPGA

DOI:10.16157/j.issn.0258-7998.172015

Author:Yang Sansan1,Jia Yudong1,Zhang Xiaoqing1,Yang Bo2

Author Affilications:1.Beijing Key Laboratory for Opto-Electronic Measurement Technology,Beijing Information Science and Technology University, Beijing 100192,China; 2.College of Electronic Science and Engineering,National University of Defense Technology,Changsha 410073,China

Abstract:This paper presents the structure and implementation of a phase detector with dynamic frequency division for eliminating nonlinearity at high frequency. After the waveform transformation, the frequency of input signal is divided into 1~255 different parts by FPGA, and the division factor can be set by 8 bit dial switch. After frequency division, digital phase detector, low pass filter and modulation and amplifying circuit, the function of phase discrimination is realized. The discrimination range and sensitivity are improved greatly and the nonlinear phenomenon at high frequency is also eliminated. The experiment results show that the input ranges of frequency is 200 kHz~100 MHz, the phase can reach -510 π~+510 π and linearity is better than ±1.5% for the phase detector. Simultaneously, the dynamic frequency division is realized according to different application requirements.
Key word:
high speed comparator
FPGA
frequency division
high linearity
phase discriminator circuit

Research and implementation of distributed optical fiber temperature measurement system based on Raman scattering

DOI:10.16157/j.issn.0258-7998.172507

Author:Yang Yang1,2

Author Affilications:1.Hebei Instrument & Meter Industry Technology Research Institute,Chengde 067000,China; 2.Hebei Instrument & Meter Engineering Technology Research Center,Chengde 067000,China

Abstract:This paper analyzes light ratio and temperature distribution of the Stokes and anti Stokes Raman scattering light, gives the optical time domain reflection distance positioning analytical expression, designs the distributed optical fiber temperature measurement system, and verifies the stability and accuracy of instrument through indoor and outdoor tests. Through thermostatic bath water temperature indoor measurement, the maximum measurement error is 0.25 ℃. The outdoor experiment sites suburb of a bridge upstream of the beach in Shenyang, the four layer of water temperature and fiber buried underground, through the sensing fiber, the temperature change can be well reflected.
Key word:
fiber
Raman scattering
distributed
temperature measurement system

Design of passive location system based on microphone array

DOI:10.16157/j.issn.0258-7998.171954

Author:Han Wenge,Su Shujing,Xue Yanjie

Author Affilications:National Key Laboratory of the Electronic Measurement Technology,North University of China,Taiyuan 030051,China

Abstract:A acoustic source passive localization system based on microphone array is designed in order to optimize the passive acoustic localization, reduce power consumption and improve the accuracy and enhance the sound source monitoring ability that personnel is not easy to reach the area of the harsh environment. The model of microphone array with five element cross shaped, the system takes FPGA as the core , the use of the VHDL logic control program to control the data acquisition and the read process , communicate with the upper machine through the USB interface, the amplifier and interface circuit module are mainly designed. The test results show that the system is accurate in positioning distance and relatively small in error which satisfies the requirement of system design.
Key word:
five element cross shaped
FPGA
data acquisition
USB interface

Research on dynamic simulation and monitoring platform of power generation system

DOI:10.16157/j.issn.0258-7998.174207

Author:Su Chang1,Gong Gangjun1,Luo Anqin1,Xiong Shengduo1,Liu Ren2

Author Affilications:1.Beijing Power System Information Security Engineering Technology Research Center in Energy Industry, North China Electric Power University,Beijing 102206,China; 2.Beijing Excellent Network Security Technology Corp.,Ltd,Beijing 102206,China

Abstract:A set of monitoring platform is designed for real-time data acquisition in power system dynamic interaction simulation, by LabVIEW software with its datalogging and supervisory control module, and verified by MATLAB/Simulink software. A simulation model of three-phase synchronous generator with load is established and could be changed into two kinds of states, through a set of programmable circuit breakers. At the same time, the electrical parameters of the generator could be continuously monitored. All the measured values transmit through OPC communication to the shared variables published on the network by virtual instrument monitoring system, in which the current values of the monitoring objects with their trend charts are displayed in real time. Lots of functions and features, like data acquisition and storage, as well as controlling with the simulation model interactively are also realized. The results of experiments show that the monitoring platform can correctly monitor the simulation model in run mode and perform in designed routine.
Key word:
interactive simulation
supervisory control and data acquisition
LabVIEW
OPC

Design of EtherCAT network configuration based on SII interface

DOI:10.16157/j.issn.0258-7998.179021

Author:Nan Yang1,2,Feng Dajun2,Zhao Dezheng2,Wang Hao2

Author Affilications:1.School of Telecommunication Engineering,Xidian University,Xi′an 710071,China; 2.National Computer System Engineering Research Institute of China,Beijing 100083,China

Abstract:This paper introduces the technology of EtherCAT industrial Ethernet. The common scheme of EtherCAT network configuration is analyzed. The way of EtherCAT configuration is studied. A method of EtherCAT configuration based on slave information interface(SII) is proposed to deal with the problem that exists in the common scheme. The experiments are designed for testing the feasibility of the scheme. The result proves that the scheme has excellent performance.
Key word:
industrial Ethernet
EtherCAT
slave information interface
network configuration

The design of real-time series acquisition system based on PC104

DOI:10.16157/j.issn.0258-7998.172691

Author:Li Jing,Han Yifei,Cui Jin,Liu Wei,Yang Xiaohua

Author Affilications:Beijing Microelectronics Technology Institute,Beijing 100076,China

Abstract:The paper describes a kind of real-time series acquisition system for the current or voltage signal based on PC104. The system consists of the host control device and the series acquisition device with the standard PC104 bus structures. The system uses the host control device to control the series acquisition device. The system can change hardware state to adapt to current signal series acquisition or voltage signal series acquisition. The user can adjust the number of the series acquisition device to get a customized multi-channel real-time series acquisition system. The real-time series acquisition system has the characteristics of generality, extensibility and miniaturization.
Key word:
PC104 bus
data acquisition
extensibility
miniaturization

Communication and Network

A hybrid AGC algorithm for high dynamic range and implementation on FPGA

DOI:10.16157/j.issn.0258-7998.171328

Author:Zhao Xiaoteng1,2,Yin Junjian1,Zhang Jintao1,2,Li Zhongmao1,Leng Yongqing1

Author Affilications:1.Institute of Microelectronic of Chinese Academy of Sciences,Beijing 100029,China; 2.University of Chinese Academy of Sciences,Beijing 100049,China

Abstract:A hybrid high-dynamic-range Automatic Gain Control(AGC) algorithm for receiver applications is proposed in this paper. The algorithm consists of radio-frequency(RF) feed-forward algorithm and intermediate-frequency(IF) feed-backward algorithm, which was implemented on Field Programmable Gate Array(FPGA). With the control of this algorithm, an AGC loop is implemented by using RF swich, digital attenuator, power detector and Variable Gain Amplifier(VGA), which displays a 110 dB input dynamic range,-100 dBm sensitivity with -19 dBm output power.
Key word:
AGC algorithm
high dynamic range
receiver
FPGA

Finding message design based on RLE encoding binary tree in D2D communication

DOI:10.16157/j.issn.0258-7998.170987

Author:Li Xiaowen,Li Xinmei,Wang Xiaojuan

Author Affilications:Chongqing Key Lab of Mobile Communications Protocol,Chongqing University of Posts and Telecommunications(CQUPT), Chongqing 400065,China

Abstract:Device-to-device communication is the technology for directly exchanging information directly between the neighboring devices, which enables the devices to implement the direct communication between the device and the adjacent device in the case of the same and active application. However, due to the large data and limited resources, a method is proposed of discovering message based on RLE encoding binary tree structure, which is designed to realize the discovery message of the device under the adjacent service. Replacing the traditional application identity value by using an application′s identity value range reduces the discovery message size and improves the discovery capability of the node, and is able to achieve a quick lookup by decoding the discovery messages that send by neighboring devices. The correctness of the proposed method is verified by theoretical analysis and experimental simulation.
Key word:
D2D communication
proximity service
binary tree
mobile applications
RLE encoding

Visualization hierarchical method based on industrial network Topology

DOI:10.16157/j.issn.0258-7998.179022

Author:Zhang Wan1,Zhang Hua2,Guo Xiaowang1,Huo Yuxian1,Zhang Xiaoli1

Author Affilications:1.North China Institute of Computer Systems Engineering,Beijing 100083,China; 2.Beijing Aerospace Control Center,Beijing 102206,China

Abstract:In order to realize the non-cross-map display of the topology industrial control network topology to the two-dimensional plane, this paper proposes a hierarchical visualization method, which based on the height of the tree of the autonomously controlled PLC. According to the hierarchical division, the interface only displays the layer configuration interface information. This method simplifies the complexity of the configuration screen, and strengthens the logical partitioning of the configuration topology. By analyzing the key degree of the node that can be connected by each node, the nodes in the network configuration are analyzed by the key degree and the warning is indicated.
Key word:
topology
hierarchical visualization
configuration warning
PLC

Research on broadband and high absorption absorber based on metamaterial

DOI:10.16157/j.issn.0258-7998.171412

Author:Yu Xiebin,Song Yaoliang,Fan Shicheng

Author Affilications:School of Electronic and Optical Engineering,Nanjing University of Science and Technology,Nanjing 210094,China

Abstract:This paper describes the design of a resistor loaded and broadband high absorption metamaterial absorber and takes it into simulation and physical test. The results of simulation show that between 8.4 to 13.6 GHz the absorption rate of the absorber is higher than 90% and the relative bandwidth achieves 47.3%,between 10.3 to 13.1 GHz the absorption rate of the absorber is higher than 99% and the relative bandwidth achieves 23.9%. In the working frequency band this absorber can still maintain a high absorption rate for incident wave with wide incidence angle. Finally, the absorption mechanism is analyzed by using the surface current and electric field distribution of the absorber. The broadband high absorption metamaterial absorber this paper designed has a huge potential application in the X band radar, electromagnetic stealth and so on.
Key word:
metamaterial absorber
broadband
high absorption
lumped resistance

A LTE system primary synchronization fast correlation algorithm with the method of combining overlapping and section

DOI:10.16157/j.issn.0258-7998.170899

Author:Tian Zengshan,Xu Jian,Li Weiguang

Author Affilications:Chongqing Key Lab of Mobile Communications Technology,Chongqing University of Posts and Telecommunications, Chongqing 400065,China

Abstract:As an important part of cell search, synchronization plays a decisive role to cell selection and time delay of response. In LTE(Long Term Evolution) system, primary synchronization effects secondary synchronization and the recognition of full duplex mode directly. Combining with the good correlation of primary synchronization signal, this paper presents an improved algorithm based on FFT fast correlation to realize the search for half frame data with the method of combining overlapping and section, and make the data cycle back to guarantee sequence integrity. Theoretical analysis and simulation show that the algorithm can effectively reduce the amount of calculation and the synchronization time. Experiments show that the algorithm can achieve accurate and efficient synchronization of PSS sequence in the LTE system.
Key word:
LTE
primary synchronization
FFT faster correlation
section and overlap
cycle back

Square loop patch dual-mode microstrip bandpass filter

DOI:10.16157/j.issn.0258-7998.171827

Author:Wu Yan1,Deng Kaile1,Wang Daiqiang2

Author Affilications:1.Institute of Big Data and Information Engineering,Guizhou University,Guiyang 550025,China; 2.Guizhou Minzu University,Guiyang 550025,China

Abstract:In this paper, a two-mode microstrip filter is proposed, which is composed of stepped impedance square-ring resonators. The structure of the filter had a corner cut,and using orthogonal direct feed way.The filter could produce attenuation poles in the bandpass on both sides,improving the stopband rejection characteristics.The proposed filter was simulated and optimized by using the software HFSS. The simulating results show that the bandpass center frequency is 2.2 GHz,with the minimum insertion loss is 0.47 dB and the 3 dB fractional bandwidth of 18.2%. The measured result is in good agreement with simulated result.
Key word:
dual-mode filter
square ring resonator
stepped impedance
microstrip bandpass filter
HFSS

Design of a novel dual-polarized chipless RFID tag

DOI:10.16157/j.issn.0258-7998.171487

Author:Zhao Feng1,He Yi1,Zou Chuanyun1,Jia Xiaolin2

Author Affilications:1.School of Information Engineering,Southwest University of Technology and Science,Mianyang 621010,China; 2.School of Computer Science and Technology,Southwest University of Technology and Science,Mianyang 621010,China

Abstract:A novel dual-polarized chipless RFID tag is proposed,which consists of horizontally and vertically polarized ‘I’ shaped resonators. The encoding method is designed by using dual-polarized encoding technique and the frequency shift encoding techniques and the encoding capacity is doubled,while reducing the number of resonators more ideal encoding capacity can still be obtained. Eventually, a 16 bit dual-polarized chipless RFID tag is designed, and its feasibility is verified by simulation. It provides a new idea for the research of chipless RFID tag.
Key word:
dual-polarized
RFID
chipless tag
encoding capacity

Direct sequence spread spectrum technology for anti-interference through-the-earth communication system for subway

DOI:10.16157/j.issn.0258-7998.171345

Author:Zeng Jiajia,Su Zhong,Li Qing

Author Affilications:Beijing Key Laboratory of High Dynamic Navigation Technology, Beijing Information Science and Technology University,Beijing 100101,China

Abstract:For the problem of multipath attenuation generated by electromagnetic wave reflection and refraction in the through-the-earth communication system for subway, an anti-interference through-the-earth communication system for subway based on spread spectrum technology is proposed. By adopting high randomness of Logistic spread spectrum code, the anti-multipath performance has greatly improved in the through-the-earth communication system for subway. The simulation results show that the bit error rate of the system is close to 0.1% when the signal is propagating in different near-earth transmission medium. And with the increase of the depth of penetration, the bit error rate tends to zero, a certain theoretical basis is established for near-earth through-the-earth communication.
Key word:
through-the-earth communication for subway
spread spectrum
Logistic
bit error rate
penetration depth

Computer Technology and Its Applications

LED wafer automatic extraction system based on visual saliency

DOI:10.16157/j.issn.0258-7998.171157

Author:Wang Xiangshi1,Wang Qi2

Author Affilications:1.Wuxi Technology Institute,Wuxi 214121,China; 2.Shenzhen Aite Intelligent Technology Company Limited,Shenzhen 518007,China

Abstract:LED wafer target detection is an important part of the grain counting system, and it is a prerequisite for ensuring the accuracy of grain counting. The threshold method is applied to extract the wafer target from the background of the release paper at present. Due to the inherent factors of the release paper, the gray scale of the imaging is not uniform,which seriously affected the recognition of the wafer target range.The system can obtain the appropriate brightness of the wafer image through the control mode of the closed-loop light source.The visual saliency of the wafer target in the internal area is further detected by the connection degree of the inner region to the boundary based on the boundary of the peripheral area of the Harris contour point. The experiments show that the system can obtain clean and uniform saliency maps of the wafers from the background of the release paper.
Key word:
wafer
threshold
boundary
Harris
saliency

Design of satellite management system software of multi task real time scheduling based on VxWorks

DOI:10.16157/j.issn.0258-7998.170141

Author:Zhao Jiankun,Zhang Dasong,Hu Ailan,Li Jianhong

Author Affilications:National Computer System Engineering Research Institute of China,Beijing 100083,China

Abstract:In the process of the design and development of star management system software, in order to satisfy the requirements of high real-time performance, high security and high reliability, this paper proposes a real-time operating system VxWorks operating system as the core of the satellite service system. VxWorks operating system employs the multi-task scheduling mechanism, combined with the method of calculation based on the round robin scheduling, moreover, developing the architecture of star management system. The results manifests that in the premise of fulfilling the satellite on-board system software design requirements, the real-time performance is improved.
Key word:
satellite management system
VxWorks RTOS
multi task scheduling mechanism

Reversible data hiding in encrypted domain based on prediction error of interpolation

DOI:10.16157/j.issn.0258-7998.170160

Author:Niu Xiangzhou,Zhang Minqing,Ke Yan

Author Affilications:Key Laboratory of Network & Information Security under the Chinese Armed Police Force, Electronic Department,Engineering College of the Armed Police Force,Xi′an 710086,China

Abstract:Considering the accuracy of traditional algorithm of the prediction error is weak, embedding capacity is low and the application in encrypted domain is limited, in this paper,an algorithm of reversible data hiding in encrypted domain based on prediction error of interpolation which combines paillier homomorphic encryption algorithm was proposed. At first the original cover image was sampled and weight was introduced,so that the non-sample pixels could be predicted using the sample pixels. Then the sample pixels were encrypted with stream cipher and the non-sample pixels were encrypted using paillier homomorphic algorithm. At last,the secret information was embedded in encrypted image. Demonstrations from experimental results show that the scheme can guarantee the accuracy of prediction and in this premise the highest embedding capacity that can be achieved is 1.2 bpp. Besides, a certain safety can be guaranteed in the scheme proposed.
Key word:
information security
reversible data hiding in encrypted domain
prediction error(PE)
interpolation
homomorphic encryption algorithm

Design method of computing acceleration module based on Loongson 3A1500

DOI:10.16157/j.issn.0258-7998.170625

Author:Wang Yanpeng

Author Affilications:Jiangsu Automation Research Institute, Lianyungang 222061, China

Abstract:To improve the computing capacity of domestic rugged computers, the paper presents a design method of computing acceleration module based on Loongson 3A1500, and introduces the modular design ideas. On the hardware side, using domestic Loongson 3A1500 processor and DDR3 memory, the paper designes 3A1500 + 2FPGA hardware components mode, and introduces the design of the power and reset circuit. On the software side, the module with domestic NeoKylin operating system and software is designed to calculate the acceleration. Finally, by performance testing, compared with X86 Core L2400 processor,results show that the design can significantly improve the performance of domestic Loongson computer calculation, average calculation speedup reach 5 or more, which indicates the effectiveness of the design method, strengthening of domestic computer has provided guidance in the application of high performance computing sense direction.
Key word:
rugged computers
Loongson 3A1500
FPGA
computing acceleration
high performance

Power Supply Technology and Its Application

Design of high speed power supply for lithium battery simulation

DOI:10.16157/j.issn.0258-7998.171489

Author:Wang Shengli,Wu Yunfeng,Zhang Chenyu,Hu Boyang,Tang Yuanhong

Author Affilications:School of Energy Science and Engineering,University of Electronic Science and Technology of China,Chengdu 611731,China

Abstract:In order to realize the charge and discharge characteristics of the simulated lithium battery, a high-speed and high-precision power supply is designed as a lithium battery simulator to realize the charging and discharging function. Power supply circuit consists of four parts, including voltage and current sampling circuit, voltage and current control circuit, push-pull structure of the main circuit, and drive circuit. The test results show that when discharging, it can achieve 0~5 V adjustable output voltage, the maximum output current of 5 A. When charging, it can achieve a 0~2 A current control function. The power supply′s rise speed and descent speed response time is less than 50 microseconds, and the power supply has an excellent response speed compared to a typical DC power response time of several tens of milliseconds. This high-speed power supply for battery testing and battery charging equipment testing has a good prospect.
Key word:
lithium battery simulation
charge and discharge characteristics
high speed power supply
push-pull structure
responding speed

Investigation of current-mode dual pulse skipping modulation buck converter

DOI:10.16157/j.issn.0258-7998.170926

Author:Feng Fei1,Wu Fangsheng1,Chen Jianfu2,Wang Weishan2

Author Affilications:1.Changzhou Vocational Institute of Engineering,Changzhou 213000,China; 2.Jiangsu University of Technology,Changzhou 213000,China

Abstract:Current-mode dual pulse skipping modulation(DPSM) technique for buck converter operating in discontinuous conduction mode(DCM) is proposed. Comparing with the voltage-mode DPSM technique, the current-mode DPSM technique adopts double closed-loops control technique and the inductor current is detected to generate control pulses with different duty ratios, which overcomes the question that the inductor current in voltage-mode DPSM switching dc-dc converter can not be detected, effectively preventing the overshoot phenomenon of the inductor current to happen in the process of start-up. Buck converter operating in DCM is taken as an example to explain the principle of the current-mode DPSM technique and the relationships between the pulse combination and the output voltage ripple. By using the dynamical analysis method, the discrete time model of current-mode DPSM DCM buck converter is established, and the combination laws of high power control pulse, low power control pulse and skipped control pulse are concluded. Finally, the results by simulations and experiments are presented to indicate that current-mode DPSM buck converter, with favorable transient performance, has much lower output voltage ripple, much wider load adjustable range and so on.
Key word:
buck converter
current mode dual pulse skipping modulation(DPSM)
discontinuous conduction mode(DCM)
pulse combination

Simulation research on a switched feedback capacitor inverter

DOI:10.16157/j.issn.0258-7998.170490

Author:Duan Mingliang,Rong Weiqing,Meng Yanjing

Author Affilications:School of Electrical and Information Engineering,Shaanxi University of Science&Technology,Xi′an 710021,China

Abstract:Aiming at the question that the energy absorption of the feedback energy when the frequency converter is with the electrical machinery load,a frequency converter with a capacitance branch topology of a power switch in series with an anti-parallel diode is designed at both ends of the DC bus.Analysis of the working principle of the structure and the relationship between the stable operation of motor energy feedback in three-phase power sinusoidal power supply with the size of the slip.Under the same capacitance value, compared with the common inverter bus, the shunt capacitor can be used to better absorb the feedback energy, eliminate the pump voltage of the bus, and make the bus voltage more stable.Through the MATLAB simulation, the feasibility of the system is verified. At the same time, under the condition that the energy is absorbed completely, the capacitance value of the shunt capacitor can be reduced to 60.53% of the parallel capacitance of the general inverter.
Key word:
frequency converter
switched capacitance
energy feedback

A GSM downlink full-band high efficiency RF harvesting technology for wearable devices

DOI:10.16157/j.issn.0258-7998.170829

Author:Liang Dongwei,Li Guolin

Author Affilications:Department of Electronic Engineering, Tsinghua University,Beijing 100084,China

Abstract:This paper concerns the possibility of powering wearable devices with ambient RF energy. For the GSM downlink band of 935~960 MHz,RF harvesting efficiency is measured on RO4003C PCB. Self-made winding coils are used in the matching circuit. The efficiency of 34.7% is gotten when the received power is -10 dBm.
Key word:
ambient energy harvesting
RF energy harvesting
wearable devices
GSM

High Speed Wired Communication Chip

High Performance Computering

Information Flow and Energy Flow in Industrial Digital Transformation

Special Antenna and Radio Frequency Front End

Radar Target Tracking Technology

Key Technologies of 5G-A and 6G

Key Technologies of 5G and Its Evolution

Key Technologies of 5G and Its Evolution

Processing and Application of Marine Target Characteristic Data

Smart Power

Antenna Technology and Its Applications

5G-Advanced and 6G

Smart Agriculture

5G Vertical Industry Application

Microelectronics in Medical and Healthcare

Key Technologies for 6G

Application of Edge Computing in IIoT

Deep Learning and Image Recognization

6G Microwave Millimeter-wave Technology

Radar Processing Technology and Evaluation

Space-Ground Integrated Technology

Industrial Ethernet Network

5G Vertical Industry Application

Innovation and Application of PKS System

FPGA and Artificial Intelligence

5G Network Construction and Optimization

RF and Microwave

Edge Computing

Network and Business Requirements for 6G

5G and Intelligent Transportation

5G R16 Core Network Evolution Technology

Satellite Nevigation Technology

5G R16 Evolution Technology

5G Wireless Network Evolution Technology

5G Network Planning Technology

5G Indoor Coverage Technology

5G MEC and Its Applications

5G Co-construction and Sharing Technology

Expert Forum

5G and Emergency Communication

5G Slicing Technology and Its Applications

Industrial Internet

5G Terminal Key Realization Technology

5G and Artificial Intelligence

5G and Internet of Vehicles

Terahertz Technology and Its Application

Signal and Information Processing

Artificial Intelligence

5G Communication

Internet of Things and the Industrial Big Data

Electronic Techniques of UAV System

Power Electronic Technology

Medical Electronics

Aerospace Electronic Technology

Robot and Industrial Automation

ADAS Technique and Its Implementation

Heterogeneous Computing

2016 IEEE International Conference on Integrated Circuits and Microsystems

ARINC859 Bus Technology

FC Network Technology

Measurement and Control Technology of Bus Network

GJB288A Bus

Key Techniques of 5G and Algorthm Implement

IEEE-1394 Bus

Signal Conditioning Technology of Sensors

AFDX Network Technology

Discrete Signal Processing

Energy-Efficient Computing

Motor control

2012 Altera Electronic Design Article Contest