Abstract：The Go language, which represents the new age of information, has a high degree of concurrency for server programming, and has natural cross-platform advantage, which reduces the difficulty of developing distributed heterogeneous computing platforms, and ultimately makes programs simple, clean and efficient. This paper will explore the transplanting of Go on the domestic platform, test the multi-nuclear function of the Go language in the dragon core and Phytium two domestic platforms, analyze the results, reach the conclusion, and provide reference for the future development of the Go language on the domestic platform.

Abstract：For high performance CPU design, especially on 16 nm and advanced process nodes, with the increase in the number of signoff corner, increasing the clock common path, improving the clock latency correlation on various RC corners, decreasing local skew of design, those are our common view. The Cadence innovus Flexible H-tree(FlexHtree) feature not only provides the symmetric buffer structure and equal wire lengths benefits of an H-tree, but also relaxes the requirement to be geometrically symmetric, enabling clock tree synthesis even in floorplans with sink placement. This paper presents an automatic Flexible H-tree flow to decrease clock skew on different corners. Meanwhile, this paper will discuss the impact of multi-taps counts and synthesis engines of the sub-tree on clock skew and design timing in details, then choses a better solution. Finally, in terms of timing, power consumption, and instance counts results, the design mentioned in this paper is suitable to use Flexible H-tree clock structure in comparison to CCOPT and fishbone structure clock tree.

Abstract：As GLOBALFOUNDRIES continues design in 7 nm technology for high speed Serdes IP, it should be noted that the complexity of layout design has increased. New challenges include complex DRC verification and complex MPT methodology in the design flow. It is therefore important to develop a layout flow(addressing this challenge), which includes new features of EDA tools (always important to the design). For example: Cadence Virtuoso Interactive Physical Verification System(VIPVS). This enables real time sign-off quality DRC checks, shortens the layout verification loop, and delivers rapid means for MPT coloring(a highlight of VIPVS). This paper will show how the GLOBALFOUNDRIES high speed Serdes layout team is using VIPVS(for rapid DRC checks and MPT coloring) in a high speed Serdes project designed in GLOBALFOUNDRIES 7 nm Finfet technology. The paper will include the verification flow and feature highlights, as well as usage of newly embedded VIPVS features.

Abstract：This paper describes a fast verification full-chain co-simulation flow based on the VSDP-XcitePI for extracting on-chip power supply models and simulating the effects of on-chip coupling interference. With this flow, XcitePI extracts the RLCK model or S-parameter model for metal layers of on-die power network and signals. This chip-level model together with package model was used in creating a new system-aware test bench to analyze the digital-to-analog interference in a RF AFE IC. The simulation results match well with the test phenomenon. Chip area of the IC used in analysis is 1.44 mm2, the analysis accuracy could support 10 μV variation，and the analysis bandwidth exceeds 5 GHz. In addition. This paper also introduces the flexible S-parameter post-processing flow inside VSDP platform, which ensures the convergence and high efficiency for the full-chain simulation.

Abstract：Design of high speed serializer/deserializer(SERDES) channel is becoming more and more important in 5G commutation and data center. In this paper, an engineering example SERDES channel is used to illustrate the strategy and method to help solve the issues in different stage of design process. By Cadence Sigrity 3D EM simulator and link simulator, via structure design and optimization, impedance matching and crosstalk issues are well handled. Consequently, it improves efficiency of design and optimization and shortens the period from design to production.

Abstract：Based on the physical structure of 40 nm MOSFETs, this paper establishes a unified MOSFET millimeter-wave noise model to characterize the characteristics of drain-current noise, inducted gate-current noise and cross-correlation noise between them. By introducing the gate overdrive effect into the high frequency noise model so that the uniform models had good smoothness, accuracy and continuity. Finally, the simulation results of the model are compared with the traditional high-frequency noise model, the validity and accuracy of the model are verified by comparing the four-noise parameters of the model with the traditional model and the measured data.

Abstract：This paper develop a high performance K-band Hair-Pin MMIC band-pass filter which is based on GaAs IPD technology. The measurement result shows that at the operation frequency of 19.5～21.3 GHz, the insertion loss of this filter is below 2.6 dB, the minimum insertion loss is 2.2 dB@20 GHz, and the return loss and group delay ripple of this filter is below -25 dB&50 ps in band. The test result is quite coincide with simulation. The size of the MMIC filter is only 2.96 mm×1.8 mm×0.1 mm, it has much less volume than the filter which is fabricated by traditional technology,and it is suite for the miniaturization trend of microwave device used in radar and communication system which has wide prospect of application.

Abstract：After studying on the thermal noise model and the matching mechanism of sensitive amplifier, an adaptively matching True Random Number Generator(TRNG) design is proposed. In this design, configurable NMOS array is embedded in the sensitive amplifier firstly，and by adjusting array’s equivalent aspect ratio it could balance the working current of sensitive amplifier. Secondly, isolation unit is added at the output to achieve the matching of complementary output loads, which can improve the randomness of the sequence. Lastly, dynamic compensation algorithm is applied to achieve the adaptive calibration of TRNG, thus broadening the scope of its application. The TRNG is semi-customedly designed with TSMC 65 nm CMOS technology. The experimental results show that it can operate properly among a wide range of voltage(0.8 to 1.4 V) and temperature(-40 to 120 ℃)，the maximum output rate can rise up to 1 GHz and the average power is 0.165 pJ/bit. The randomly outputted sequence has passed the National Institute of Standards and Technology(NIST) randomness tests.

Abstract：High performance data converter is the core device of the fifth generation mobile communication base station system. Its sampling rate is no less than 3 GS/s and the resolution is higher than 12 bit. Therefore, it is inevitable for high-speed serial interface to replace traditional interface circuits. Based on JESD204B protocol, this paper designs a high speed serial interface control layer circuit applied to 3 GS/s 12 bit ADCs. Under the premise of ensuring high-speed transmission, it considers the power consumption and resources in the compromise. The circuit adopts the pre-frequency technique to complete the framing in the transmission layer, and the 8 B/10 B coding is implemented by using the polar information to simplify encoding techniques in the data link layer. In Vivado 16.1 environment, using the Xilinx ZC706 FPGA PHY IP and JESD204B Receiver IP, the verification of the interface circuit proposed in this paper is completed. The experimental results show that the data transmission is correct, the serialized transmission speed is 7.5 Gb/s. Compared with the same type interface design, the transmission speed is increased by 50%.

Abstract：Power metal oxide semiconductor FET(P-MOSFET)is the core device that forms the power communication power，its reliability directly affects the safe and stable operation of power communication. Random telegraph signal(RTS) noise is a sensitive parameter to characterize its reliability. In order to be able to detect and analyze RTS noise inside P-MOSFET，an improved empirical mode decomposition(EMD) adaptive selection algorithm is proposed to detect RTS noise, the RTS noise is analyzed by using time and waveform correlation coefficient. Simulation results show that the new algorithm has better filtering effect than traditional algorithm, the optimized high order cumulant not only improves RTS noise processing capability, but also proves that it has 1/f at zero frequency.

Abstract：MBIST(Memory Built-In Self-Test) technology has extensive application in the memory test. In view of the traditional BIST controller register transfer level description language design process is relatively complicated, special flexibility EDA tools to define algorithm flexibility is poor, and the circuit structure is fixed, this paper proposes the use of high-level synthesis tools BIST controller design method. This paper takes SRAM as the object, describes the MARCH algorithm in C language, and uses port allocation, pipeline optimization and array segmentation to optimize the design. Finally, with the tools of the FPGA platform it verifies and evaluates the function reliability and scle controllability of the high-level synthesis synthesized RTL code level circuit. Compared with the two traditional methods, the limitation of algorithm implementation and circuit structure is eliminated, and the implementation period of the algorithm is reduced.

Abstract：Double-precision floating-point multiplication parts is one of the most important unit of high performance CPU.This article describes the use of Cadence Stratus HLS tools in 28 nm process design and implement double-precision floating-point multiplication. The frequency of this multiplication is 2.5 GHz, and its area is 28 211 square micrometers, which almost meets the requirements of high performance microprocessor development. The experiences of this work enhance the confidence of the more widely using of the new design methodology in our project.

Abstract：The ultra-high transistor density and increasing frequency lead to more critical power integrity issues. Vector-dependent simulation based on FSDB generates more accurate analysis. It’s not practical to simulate full chip through the simulation cycle, it needs profiling to provide interval with high coverage of realistic application. Considering power integrity relevant phenomenon, based on multiple scenario profiling, it improves IR-Drop and PowerEM violation coverage, to achieve a more comprehensive power integrity analysis.

Abstract：Aiming at the demand for household ECG monitoring, a multi-lead real-time ECG monitor system based on SOPC is designed. The system uses ADS1298 as the ECG signal acquisition front-end, and the data of multi-lead are sent to the back-end by ZigBee to be processed. The back end of the system is FPGA embedded with ARM Cortex A9 dual core processor. The Linux operating system is transplanted on ARM. The ECG data receiving, format conversion, FIR filtering, LMS adaptive notch filter and data cache are realized by parallel processing, pipeline design and custom IP core in FPGA. QRS detection algorithm, analysis of heart rate variability and myocardial infarction detection algorithm are implemented on ARM. ECG data are received, filtered, and stored in SD card and analyzed in real time, and the ECG waveform and analysis results are displayed on the LCD.

Abstract：Aiming at the shortcomings of the existing monitoring methods for mechanical wear, a design is proposed in this paper for oil wear particles online monitoring system based on optical method, which can realize the detection for internal wear of gear box or hydraulic equipment under the complex environments, improve detecting ranges of the wear particles and reduce the cost of on-line wear monitoring. A design for image acquisition processor is proposed to realize the acquisition, processing and transmission for HD plane array camera images. The hardware circuit of the image acquisition processor is designed based on the Freescale I.MX6Q. In the embedded Linux environment, the software of the image acquisition processor is designed based on OpenCV to realize the processing of the images captured by the plane array camera. Experiments show that the image acquisition processor can realize functions of on-line wear particles image acquisition, processing and wireless transmission, and can be used for oil detection, fault prediction and diagnosis in bad working environments.

Abstract：The protection performance of lightning arrester(MOA) has direct impact on insulation level of the transformer and other electrical equipment , the potential distribution and the temperature distribution of the arrester determines the operating life of a lightning arrester. In the case of reasonable pressure sharing measures, it will effectively slow down the aging of arrester and reduce the possibility of thermal collapse. It is necessary to test the potential distribution of arrester to adjust the voltage distribution of arrester. The design uses high performance portable microprocessor, wireless synchronous acquisition technology, design of the lightning arrester potential distribution and temperature distribution system based on wireless acquisition technology. The arrester potential distribution and temperature distribution in the wireless synchronization testing is the traditional way of fiber-optic cable test methods based on test upgrade, which simplifies the tedious scene of fiber-optic cabling and improves the accuracy of the test data. According to the voltage distribution and temperature distribution measured by the arrester, effective data are provided for subsequent voltage sharing of the lightning arrester, which is beneficial to the safe and reliable operation of the power grid.

Abstract：A real-time on-line road pavement breakage and position detection device is proposed in this essay. The device uses image processing identification technology to determine whether there is any damage in the acquired images of road surface. The Beidou navigation system is applied to locate the damaged object while the mobile communication system is used to realize the real-time transmission of damaged images and the information of location. The entire device can be achieved through using FPGA. In the identification of pavement damage，Sobel algorithm is improved，which could further increase the accuracy of detection and enhance the ability of anti-interference.Illustrated by the example of crack identification, the cracks are divided into four categories: lateral, longitudinal, block and crack. The accuracy of this device can reach 88.75% under the speed of 70 km/h. In addition, the background of the entire system administration displays the information of broken images, broken types, location，map annotations and so on.

Abstract：According to the research status and existing problems of automotive radar, an automotive radar system implementation scheme based on MFSK(multi frequency shift keying) waveform is studied in this paper. The target measurement principle of the system is analyzed in detail, the hardware structure of the system and the implementation process of the FPGA algorithm are introduced too. The algorithm combines all phase FFT and improved CA-CFAR(cell-averaging constant false alarm) algorithm to ensure the measurement accuracy of the system. The experimental results show that the system has high measurement precision, it can achieve the non fuzzy target measurement, and the system runs stably.

Abstract：In order to monitor sleep condition more conveniently and assess sleep quality, a sleep monitoring system based on intelligent terminal was designed in this paper. The system mainly consists of signal acquisition module and intelligent terminal. The signal acquisition module communicates with intelligent terminal by bluetooth, which realizes collection, receiving, analysis and storage of electroencephalogram(EEG) signals. The intelligent terminal uses wavelet transform to denoise EEG signals. The sample entropy is extracted as the feature parameter, and the random forest(RF) algorithm is used to do the automatic staging, so as to assess sleep quality. Five volunteers participated in the experiment. The results show that signal acquisition module can collect high quality EEG signals and the analysis software can evaluate sleep quality quickly and accurately. The system has the advantages of small volume and low power consumption. It can be used to quantitatively reflect and objectively evaluate the quality of sleep.

Abstract：This article designed a data acquisition system for Time-of-Flight Secondary Ion Mass Spectrometer(TOF-SIMS). The system uses high speed Analog-to-Digital conversion(ADC) for sampling of analog signals. The timing controller is FPGA. The DDR3 SDRAM is used to store massive amounts of data. PCI-Express(PCIE) bus is used to communicate with computer，and the ADC dynamic performance and PCI-Express bus read and write speed are tested. The results show that the system acquires the sine wave with the frequency of 400 MHz, the signal to noise ratio of ADC is 56.333 dB, the total harmonic distortion is -63.509 dB, the effective number is 8.995 bit，and PCI-Express bus has write speed of 1 135 MB/s and read speed of 1 002 MB/s，which meet needs of the TOF-SIMS.

Abstract：In order to solve the problem of bit error and short transmission distance in the process of LVDS high-speed link transmission, the optimization scheme is proposed from hardware and logic coding respectively. In the aspect of hardware, the high speed driver is added to the LVDS transmitter, and the adaptive equalizer is added at the receiver to compensate the attenuation of the signal in the long distance transmission and restore the distorted signal in the twisted pair. In the aspect of logic coding, the traditional 10B8B coding method is improved, and a 10B6B coding method with self correcting ability is designed, which not only improves the DC balance status of twisted pair, but also reduces the bit error rate in the LVDS transmission process. Compared with the normal coded LVDS interface, the optimized LVDS interface has a longer transmission distance and a smaller bit error rate. The design method is simple and reliable, and the performance is stable. The experimental results show that the zero error rate reliable transmission can be realized at 400 Mb/s rate under the 48 m differential twisted pair length.

Abstract：The design goals of VANET(Vehicular Ad-Hoc Networks) are to provide an open public road safety services，and to improve the comfort and efficiency of driving. In VANET, multi channels are employed to transmit safety information and non-safety information respectively. This paper analyzes protocols associating with VANET in detail and proposes an improved multi-channel MAC cooperation scheme. Based on the network simulation software NS2, this paper designs the simulation model for VANET, adds the multi-channel module and application layer module into the network simulation software NS2, and then simulates the single channel and multi-channel, and the improved MAC protocol. From the simulation, it shows that compared with the single channel, multi channels can obtain better throughput, and the improved MAC protocol also has lower latency and message collision ratio than the original standard.

Abstract：Orbital angular momentum(OAM) technology provides a new modulation dimension for wireless communication system, and it has become an effective way to solve the problem of spectrum resource shortage. A novel OAM array antenna is proposed in this paper, which uses a dielectric resonator array antenna to produce a OAM beam. The simulation results show that the OAM antenna array radius affects the OAM beam effect, the suitable feeding position and feeding mode can ameliorate the central space problem and improve the quality of long-distance transmission of OAM beam. This OAM array antenna has the advantages of small volume and wide selection of dielectric materials, it can solve the problem of the ring-shaped OAM microstrip array antenna, which is the high loss of the high frequency band and the large size of the low frequency band. It provides a new reference value for the practical application of OAM array antenna in the field of wireless communication.

Abstract：The use of discontinuous reception(DRX) mechanism is an important means for the mobile terminal to reduce power consumption. In the NB-IoT system, the business has characteristics of low rate and low frequency,it requires the terminal to have very low power consumption. To meet its business characteristics, this paper has made some changes to DRX, and the extended discontinuous reception(eDRX) is adopted. In this paper, the basic principle of the eDRX mechanism is analyzed in detail by various timer operations, furthermore, the eDRX model is built. The simulation results show the performance of eDRX mechanism in power saving and delay.

Abstract：In view of the current demand for various frequency signal sources in the fields of control, telecommunications and electronic instrumentation, a high cost-effective STM32F103RCT6 control chip is used to generate various frequency signals through the button control of the high-performance DDS chip AD9910 and real-time display through the LCD12864. This article describes in detail the system hardware and software design, and the key part, precautions and the use of tools for specific instructions. Finally the designed system is verified, and the results show that the system is stable and can meet the engineering needs.

Abstract：Sphere decoder(SD) has variable complexity, and the traditional fixed-complexity sphere decoder(FSD) is not applicable for rank-deficient(NT>NR) multiple input multiple output(MIMO) systems. To overcome these difficulties, in this paper, robust fixed-complexity sphere decoders(RFSD-s) based on new preprocessing algorithms are proposed for rank-deficient MIMO systems. With respect to the cases without and with information on the level of noise, RFSD using zero-forcing technique(RFSD-ZF) and FSD using minimum mean square error technique(FSD-MMSE) are proposed respectively. To reduce the computational complexity of RFSD-ZF, a simplified RFSD-ZF(SRFSD-ZF) with little performance loss is also introduced. Simulation results show that, besides better performance than the traditional FSD, the proposed techniques are robust to the configuration of MIMO antennas.

Abstract：To improve the real-time data transmission rate of unmanned vehicle ad hoc network and improve the throughput of unmanned vehicle network, a cooperative resource allocation algorithm for unmanned vehicle network link scheduling is proposed. Firstly, a 2-H cooperative communication system is constructed. The value function is used to describe the relationship between the link rate and the allocated resource unit. The maximum throughput equation of the unmanned vehicle is further proposed. Then, to allocate the communication resources reasonably, the link rate is dispatched based on multi-select knapsack problem, and the optimal value of the number of unmanned vehicle nodes is solved by exhaustive search method. Experimental results show that, compared with the vehicle network based on the distributed sensing and clustering and the optimization of the vehicle network based on the channel transmission model, the proposed algorithm improves the link speed by 8.7% and 7.4% respectively, and the total network throughput is improved respectively 10.6% and 12.8%. The proposed algorithm can better meet the requirements of data transmission rate of unmanned vehicle networks.

Abstract：To achieve the dynamic allocation of multiple resources and improve the resource utilization with ensuring the queue stability, the paper proposes a joint resource optimization algorithm based on queue stability in wireless virtualized networks. Considering the cache resource constraints and different pricing mechanisms for each virtual operator, the algorithm allocates multiple virtual resources as a joint optimization problem, and establishes a utility function aiming at maximizing the profit of virtual operators. Secondly, based on the data volume, a distributed scheduling algorithm is designed to balance the optimality of the virtual network revenue and the stability of the system queue through Lyapunov stochastic optimization. Finally, the Lagrange duality theory is used to solve the model. The simulation results show that the proposed method can effectively improve the total average revenue of virtual network while guaranteeing the queue stability.

Abstract：In order to improve the accuracy and serviceability of information system security risk assessment and reduce the impact of subjective factors in risk assessment, based on fuzzy analytic hierarchy process and attack tree model, the security risk of information system is evaluated. Firstly, the attack tree model is used to describe the possible attack path. And then, the attack probability is calculated, assuming that each leaf node has different security properties. Fuzzy AHP method is adopted to solve the security attribute weights. To reduce the influence of subjective factors during expert scoring, assuming that attribute scores are interval variables, an attribute probability generation model based on interval variables is established. Finally, an example is used to verify the analysis. It shows that this method not only reduces the influence of subjective factors in risk assessment, but also has clear thinking and simple methods. It has versatility and engineering application value.

Abstract：Electronic transformers and merging units are the core components of smart substation. The performance and accuracy of these indicators have a decisive impact on the following measures: protection, measurement and control, and digital energy metering. However, selection or acceptance, regular testing and other aspects of the measures taken or means have not yet reached a perfect, comprehensive and accurate level. This paper presents a merging unit tester traceability device with table source integrated separable structure characteristics, both for electronic transformer calibrator and the merging unit tester traceability. It can also directly calibrate the electronic transformer and the merging unit error.

Abstract：Aiming at the difficulty of Beidou reflected signal acquisition, this paper presents a capture algorithm for the reflected signal in the Beidou GNSS-R receiver. The algorithm uses the navigation data in the direct signal to peel off the navigation data in the reflected signal, and improves the traditional reflection signal acquisition algorithm through the cyclic accumulation operation and the FFT correlation.The algorithm can greatly reduce the computational complexity and shorten the capture time of long time integral of the reflected signal.In this paper, the MATLAB simulation of the new algorithm is carried out, and compared with the traditional coherent-uncoupling algorithm and the difference coherence algorithm. The simulation results show that the algorithm in this paper is superior to the traditional coherent noncoherent and differential coherent acquisition algorithm in capturing performance.

Abstract：In order to realize digital measurement and objective function assessment for joint angle, an joint angle digital measuring and functional assessing system is established and its applied algorithms is investigated. Firstly, based on Kinect data acquisition principles and calculation method of space vectors, the joint angle measuring algorithm is presented. The space points of joint on the basis of the depth data of Kinect are converted to the corresponding three-dimensional coordinates which will be used to calculate the Euclidean distance between each key point, and the joint space angles are calculated according to the angle formula of space vector. Then after the performance of several clustering methods is compared, the algorithm of function assessing by K-means is analyzed. Experimental results indicate that the system can realize the digital measuring and assessing, and the precision of the clustering indexes of purity，RI and F-meaures can be stabled in 0.8 and above. It can satisfy the system requirements of non-contact, objective, effective, higher precision and strong adaptability, as well as user-friendly control and low cost.

Abstract：This paper proposes a feature matching algorithm for partial limitation search regions, which combines spatial constraints with local descriptors. Based on the ASIFT algorithm, this paper improves the defects of directly removing one-to-many and many-to-one feature points in the feature matching phase. Since many of these removed feature points can be properly matched,resulting match points less. This paper will find a new unmatched pair of points within the surrounding area of the matching pairs, and finally achieve the goal of raising the correct number of matches. Experiments show that the feature matching algorithm proposed in this paper can greatly increase the number of feature matching compared with the ASIFT algorithm.

Abstract：In this paper, two different coupling structures, including the plane winding of the transmitting coil and the vertical winding of the transmitting coil, are designed. A magnetic coupling mechanism with large transmission power is selected and the smoothness of the contactless power transmission(CPT) is also studied when the deviation occurs between the transmitting coil and the receiving coil. By means of ANSYS finite element simulation tool, the self-inductance and mutual inductance of the two kinds of coupled coupling coils are obtained, and the change of transmission power of the coupling mechanism along the relative motion of the track is also simulated. The two coupling mechanisms were made in the experiment. Finally, a magnetic coupling mechanism with strong transmission capability was selected, and the results show that the system can be able to maintain good smoothness.

Abstract：This paper presents an improved three-phase PWM rectifier with predicted current space voltage-vector pulse width modulation technology. The designed rectifier can realize controllable soft start, and has high power factor and wide voltage regulation．A new over current protection circuit is designed，which has fast response speed and can meet repetitive start requirement of high voltage supply application．Simulation and test results show that the improved PWM rectifier can achieve controllable soft start and the error in steady state is less than 2%，the recovery time is less than 0.5 s after a sudden change of the load，the power factor is more than 95%．

Abstract：This paper proposes a new series-L/parallel-tuned class DE-1 power amplifier. The theoretical analysis was conducted according to zero current switching(ZCS) and zero current slope switching(ZCSS) conditions. The closed form design equations under ideal switching conditions were given. The performance of the power amplifier was calculated. Theoretically, class DE-1 power amplifier has efficiency of 100%. It has both of the advantage of class D and class E-1. Circuit implementation was carried out to verify the proposed amplifier. In the experiment, the supply voltage is 3 V, and the optimal working frequency is 110 kHz, and the power amplifier achieves efficiency of 97.8%. Good agreement between theory and experiment results is achieved.

Abstract：This paper adopts duty cycle compensation current control strategy to resolve the increasing current stress in one of the branches of the interleaved parallel Boost PFC converter, which is caused by the unequal branch current when the power factor correction converter works in inductor current continuous conduction mode. By adding the duty cycle compensation controller in the traditional controller，the branch current can be equalled and decrease the current stress. Lastly, the simulation is created. Before adopting the new strategy, the two branch current are 5 A and 2.2 A, the peak current of the MOSFET in 5 A branch is 9.2 A; After adoping the new strategy, the two branch current are both 3.6 A, the peak current of the MOSFET in both branch are 6.8 A. From the analysis of the simulation，the new strategy can achieve the equal branch current and decrease the branch current stress. Simultaneously, the feasibility of the interleaved-parallel CCM Boost PFC converter under the new strategy is verified.