2021 No. 06

Publish Date:2021-06-06
ISSN:0258-7998
CN:11-2305/TN
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Special Column-Key Technologies for 6G

Blockchain based spectrum sharing over 6G hybrid cloud

DOI:10.16157/j.issn.0258-7998.211772

Author:Mang Ge

Author Affilications:China Telecom Research Institute,Beijing 102209,China

Abstract:This work investigates the dynamic spectrum sharing in the 6G enhanced ultra-reliable and low latency communications (euRLLC) services, as more and more Internet of Things(IoT) devices need to communicate between each other in the limited spectrum. This paper combines blockchain technology with 6G hybrid cloud to realize the spectrum sharing between IoT devices. Due to blockchain′s distributed storage and credibility, blockchain based dynamic spectrum sharing can achieve flexible, feasible and much more efficient spectrum allocation. This paper analyzes the process of spectrum sharing and proposes a wireless spectrum resource sharing structure in euRLLC based on reinforcement learning(RL), including resource classification, resource scheduling, overall model and neural network optimization. This design integrates blockchain and hybrid cloud to build a public management platform to register and manage the information of IoT devices using unified coding and identification standards.
Key word:
euRLLC
spectrum sharing
6G hybrid cloud
blockchain

A multi-layer architecture study of the space-air-ground integrated network for the IoT services

DOI:10.16157/j.issn.0258-7998.211764

Author:Zhang Shaowei

Author Affilications:China Telecom Research Institute,Beijing 102209,China

Abstract:In order to meet the long-term requirements of global comprehensive three-dimensional coverage and access anytime, anywhere in the future, the space-air-ground integrated network(SAGIN) as an ideal network architecture has become an important research direction in recent years. The paper describes some typical business scenarios in future communications, analyzes the network architecture and composition of SAGIN, and studies the key technologies to realize SAGIN. Finally, it points out some of the research directions of SAGIN.
Key word:
6G
space-air-ground integrated network(SAGIN)
Internet of Things(IoT)

Overview of the intelligent reflective surface technique for B5G/6G communications

DOI:10.16157/j.issn.0258-7998.211305

Author:Li Gang1,2,Wang Yuxin1,2,3,Zhang Xiuyin3,Chen Zhen3,Chen Yijian1,2,Dou Jianwu1,2,Yang Jun1,2,Lu Haitao1,2

Author Affilications:1.ZTE Corporation, Shenzhen 518055, China; 2.State Key Laboratory of Mobile Network and Mobile Multimedia Technology,Shenzhen 518055,China; 3.South China University of Technology,Guangzhou 510641,China

Abstract:The technique of intelligent reflective surface can significantly improve the coverage of transmitted signal, and is one of the potential techniques for B5G/6G communications. This paper introduces the progress of the key techniques of intelligent reflective surface in theoretical researches, including channel estimation, beam management, IRS-aid NOMA, IRS-aid physical layer security, and then gives the research plan of IRS in future.
Key word:
B5G/6G
intelligent reflective surface(IRS)
MIMO
NOMA
millimeter-wave

Review and Comment

5G-oriented SON 3GPP standard evolution

DOI:10.16157/j.issn.0258-7998.201144

Author:Zhang Huili

Author Affilications:Chongqing Academy of Information and Communication Technology,Chongqing 400000,China

Abstract:In order to support a wide range of QoS levels, 5G networks need to be automatically adjusted to respond to network conditions in order to maintain the best performance efficiency. 5G networks will have more cells than previous generations of cellular mobile communication networks, so self-organizing networks (SON) are more important for operators to manage complex 5G networks. This article introduces the research work of 3GPP working group SA5 and RAN for 5G SON, and elaborates on key optimization technologies such as automatic neighbor relationship, PCI configuration, capacity and coverage optimization, load balancing optimization, mobile robustness optimization, and RACH optimization.
Key word:
5G
SON
3GPP

Overview of 2D human pose estimation based on convolutional neural network

DOI:10.16157/j.issn.0258-7998.201087

Author:Qiao Yi,Qu Yi

Author Affilications:College of Information Engineering,Engineering University of PAP,Xi′an 710086,China

Abstract:With the rapid development of deep learning, 2D human pose estimation is used as the research basis for other computer vision tasks, and its detection speed and accuracy have practical significance for subsequent applications. This paper introduces the methods of 2D human pose estimation based on convolutional neural networks in recent years. The existing methods are divided into human body detection combined with joint point regression algorithm and human body joint point detection clustering algorithm. At the same time, the current mainstream datasets and the evaluation criteria are summarized, and finally the current difficulties and future development trends of 2D human pose estimation are explained, which provides some references for related research on pose estimation.
Key word:
2D human pose estimation
convolutional neural network
keypoints of the human body

Artificial Intelligence

Face recognition with extreme posture and expression

DOI:10.16157/j.issn.0258-7998.200968

Author:Kuang Chaoqing1,2,3,He Chao1,2,3,Wang Juncheng1,2,3,Zou Jianwen1,2,3

Author Affilications:1.School of Communication and Information Engineering,Chongqing University of Posts and Telecommunications, Chongqing 400065,China; 2.Optical Communications and Networks Key Laboratory of Chongqing,Chongqing 400065,China; 3.Ubiquitous Sensing and Networking Key Laboratory of Chongqing,Chongqing 400065,China

Abstract:With the development of information technology, face recognition is used more and more in payment, work and security system. In the edge computing system, in order to deal with the speed, we usually choose a smaller neural network for face recognition, which may cause the recognition rate is not very high. And in practical applications, most of them can recognize the face with high image quality, but the recognition rate is not very high for the face which is greatly affected by the light and has great changes in expression and posture. Therefore, this paper chooses the SqueezeNet lightweight network, which has a small number of layers and can be well used in edge computing system. The method of preprocessing is used to preprocess the image, and then the loss function of SqueezeNet network and the residual learning method of ResNet network are improved. Finally, through the test of LFW and IJB-A data set, it is concluded that the research method in this paper can significantly improve the recognition rate.
Key word:
neural network
face recognition
preprocessing
SqueezeNet network
ResNet network

A telecom fraud identification method based on graph neural network

DOI:10.16157/j.issn.0258-7998.200976

Author:Zhang Jiejun1,Tang Yingchun1,Ji Shuyun2,Li Jinglin2

Author Affilications:1.China Telecom Corporation Limited Shanghai Branch,Shanghai 200041,China; 2.State Key Laboratory of Networking and Switching Technology,Beijing University of Posts and Telecommunications, Beijing 100876,China

Abstract:While communication technology brings convenience to people, telecom fraud also increases sharply. Traditional detection methods are mainly based on data mining and statistical learning of history data. However, due to the high similarity between fraud behavior and normal business, traditional statistical methods are difficult to screen. This paper proposes to transform user communication relationship into a set of topological features and establish communication social directed graph, where vertices with statistical characteristics represent users and edges with relational characteristics represent activities between them. On the basis of the communication social graph, the potential characteristics of the communication social network are learned through the graph neural network, and the information characteristics of multiple nodes are aggregated through pooling readout mechanism, in order to identify the telecom fraud users. The validation of real communication history data shows the effectiveness of this method.
Key word:
fraud detection
communication social network
graph neural networks
behavior classification

Microelectronic Technology

Design and verification of a configurable LVDS controller based on AXI bus

DOI:10.16157/j.issn.0258-7998.201211

Author:Meng Yuting,Yuan Haiying,Ding Dong

Author Affilications:School of Microelectronics,Faculty of Information Technology,Beijing University of Technology,Beijing 100124,China

Abstract:In view of the differences of data bit width, frame format and storage mode and flexibility of data transmission in different application scenarios,a configurable LVDS controller based on AXI bus was proposed. In order to achieve precise control of LVDS controller, a configurable register module based on APB interface was added, and data transmission was controlled by software on the SoC system, which effectively improved the flexibility of data transmission and reception. In order to improve the transmission efficiency and widely adapt to the scenario requirements, the interface that interacts with the memory is defined as the interface of the AXI protocol. In order to avoid data transmission errors and packet loss, a parity function was added to the custom protocol and the packet checking mechanism was added to the circuit. Then, an efficient loopback verification scheme was used to perform functional tests on the LVDS controller. The experimental results show that the LVDS controller based on AXI interface can accurately and efficiently realize the data transmission and reception function between the peer devices. This configurable data transmission circuit design and verification scheme is flexible and feasible, so that it can be widely used in video image data transmission.
Key word:
AXI bus
LVDS controller
high-speed interface
configurable module
data transceiver

A low temperature drift VCO for SoC power supply noise measurement

Author:Zhai Pengfei1,Zhou Xiong1,Li Qiang1,2

Author Affilications:1.School of Electronic Science and Engineering,University of Electronic Science and Technology of China,Chengdu 610054,China; 2.Pazhou Lab(Guangdong Artificial Intelligence and Digital Economy Laboratory(Guangzhou)),Guangzhou 510330,China

Abstract:This paper presents a two-stage temperature compensated ring VCO-based quantizer for on-chip power supply noise measurement. To achieve a lower temperature coefficient, the coarse and fine temperature compensated stages are both exploited. In the coarse stage, a proportional-to-absolute-temperature(PTAT) current injects in the current starved ring VCO to compensate the large part of the temperature coefficient of the VCO, and as the fine compensated stage, a replica VCO is employed to sense temperature variation and further adjust the oscillation frequency of the VCO adaptively. The ring VCO-based quantizer is operated at a 1.1 V supply. The simulation results show the output frequency of the VCO is 4.3 GHz, and it achieves a low temperature sensitivity of 15.5 ppm/℃ over the range from -40 ℃ to 125 ℃ with the two-stage temperature compensation.
Key word:
temperature compensation
ring oscillator
VCO-based quantizer
power supply noise measurement

H-bridge driver circuit layout design based on HVCMOS technology

DOI:10.16157/j.issn.0258-7998.201078

Author:Li Fang,Jiao Jiye,Ma Caicai

Author Affilications:College of Electronic Engineer,Xi′an University of Posts and Telecommunications,Xi′an 710000,China

Abstract:The design and realization of a H-bridge which is power integrated circuit(Power IC, PIC) and based on the HVCMOS process with low cost, high integration and strong driving performance is introduced. The established metal interconnection evaluation model can judge the H-bridge physical layout in the early stage of the design and does not rely on post-design simulation, thereby improving design efficiency.The comparison result of different interconnection design of H-bridge shows that the interconnection of multi-finger array device(M2 layer and above metal) is perpendicular to the metal layer M1 of the device and ladder-shaped structure can improve the effective aspect ratio of the interconnection along the current flow direction, thus reduce parasitic resistance.
Key word:
HVCMOS
H-bridge
high integration
low on-resistance

Measurement Control Technology and Instruments

Design and implementation of LVDS clockless data transmission scheme based on FPGA

DOI:10.16157/j.issn.0258-7998.201076

Author:Bi Yanfeng1,Li Jie1,Hu Chenjun2

Author Affilications:1.State Key Laboratory of Electronic Testing Technology,North University of China,Taiyuan 030051,China; 2.Suzhou Zhongsheng Nanotechnology Company,Suzhou 215123,China

Abstract:Aiming at the miniaturization requirements of off-line bomb-borne data acquisition and storage equipment, an FPGA-based LVDS clockless high-speed data transmission system is designed. Without an external interface chip, the onboard clock is used to replace the differential clock, and only a pair of differential pins can complete a LVDS clockless data transmission. When there are many data interfaces in the system, the board volume can be greatly reduced. The problem of phase detector failure is solved by increasing the deserialization ratio of the FPGA internal SERDES and 8B/10B encoding of the data, so to provide accurate phase information for the onboard clock to align the serial data and the analog clock. Finally,following the analog clock,the serial LVDS data is deserialized, so as to achieve the purpose of replacing the LVDS accompanying clock with the onboard clock, so as to achieve high-speed LVDS transmission based on FPGA without accompanying clock. Tests show that the system can work reliably and effectively, and has certain engineering practical value.
Key word:
FPGA
no clock transmission
LVDS
SERDES

Design of intelligent lock system based on Wi-Fi and face recognition technology

DOI:10.16157/j.issn.0258-7998.200861

Author:Zhou Yang,Xiong Junqiao

Author Affilications:School of Electrical and Information Engineering,Wuhan Institute of Technology,Wuhan 430205,China

Abstract:Aiming at the security problems existing in traditional door locks, an intelligent lock system combining Wi-Fi technology and face recognition technology is designed. The system adopts STM32F103 as the core control device and CC1101 as the communication and transmission module, which can effectively reduce power consumption and realize information interaction. MULBP(Multiple Uniform Local Binary Patterns,MULBP) face recognition algorithm is put forward at the same time, compared with before improvement to enhance the image grayscale average and each row, column and diagonal elements, the relationship between value of new LBP operator is more able to reflect the local texture feature, and combined with 2DLDA(Two-dimensional Linear Discriminant Analysis,2DLDA) algorithm find the projection matrix, to make the sample more easy to distinguish, easier for feature extraction. The results show that the fusion algorithm not only reduces the feature dimension but also improves the recognition rate, making the system achieve the purpose of intelligent anti-theft.
Key word:
intelligent lock
wireless communication technology
local binary mode
two-dimensional linear discriminant analysis

The establishment of evaluation system of smart speakers based on QFD

DOI:10.16157/j.issn.0258-7998.200827

Author:Li Qiang,Xu Yihua

Author Affilications:China Mobile(Hangzhou) Information Technology Co.,Ltd.,Hangzhou 311121,China

Abstract:As one of the terminals of smart home, the smart speakers is an important constituent of smart home.Therefore many evaluations of the smart speakers were released by evaluation institutions.However,most evaluations institutions were just focused on technical specifications of the smart speakers,not customer requirements,which caused the the evaluation results could not meet the requirements of customer and market. This paper discussed how to establish an evaluation system which introduced quality function deployment(QFD),and establish the evaluation system which is meet the requirements of customer to provide helpful reference for the professionals.
Key word:
QFD
smart speakers
evaluation

Communication and Network

Multi-carrier waveform recognition of OFDM and FBMC based on spectral features

DOI:10.16157/j.issn.0258-7998.201053

Author:Shao Kai1,2,Li Hui1,2,Zhou Juanhong1,2

Author Affilications:1.School of Communication and Information Engineering,Chongqing University of Posts and Telecommunications, Chongqing 400065,China; 2.Chongqing Key Laboratory of Mobile Communications Technology,Chongqing University of Posts and Telecommunications, Chongqing 400065,China

Abstract:This paper focuses on the modulation recognition of orthogonal frequency division multiplexing(OFDM) and filter bank-based multicarrier(FBMC). Firstly, the quadratic spectrum of subcarrier signals is analyzed for OFDM and FBMC. Then,the corresponding quadratic spectrum expression is gotten through modeling, and the intensity and position of each spectrum are gotten. Finally,seting the characteristic parameters, the modulation identification of OFDM/FBMC is accomplished under Gaussian noise. The simulation results show that the signal recognition rate is still higher at a lower SNR.
Key word:
modulation signal recognition
filter bank-based multicarrier(FBMC)
orthogonal frequency division multiplexing(OFDM)
quadratic spectrum

Computer Technology and Its Applications

A recovery methodology for SRAM-based FPGA partitioned TMR

DOI:10.16157/j.issn.0258-7998.200384

Author:Wang Peng,Liu Zhengqing,Tian Yi

Author Affilications:College of Airworthiness,Civil Aviation University of China,Tianjin 300300,China

Abstract:SRAM-based FPGAs are popular in the aerospace industry for their field programmability and low cost. However, they suffer from cosmic radiation-induced single event effect(SEE). Triple modular redundancy(TMR) is a well-known technique to mitigate SEEs in FPGAs that is often used with another SEE mitigation technique known as configuration scrubbing. Traditional TMR provides protection against a single fault at a time, while partitioned TMR provides improved availability. A recovery methodology to combine partitioned TMR and configuration scrubbing is presented in this paper, and the results show that the improvement in availability is achieved by the proposed methodology.
Key word:
single event effect
FPGA
partitioned TMR
recovery

Real-time estimation of three-dimensional attitude of towers based on deep learning

DOI:10.16157/j.issn.0258-7998.200280

Author:Li Guoqiang1,Peng Chigang1,Wang Yong1,Xiang Dongwei2,Yang Chengcheng2

Author Affilications:1.Machine Operation Center,Guangdong Power Grid Co.,Ltd.,Guangzhou 510062,China; 2.Wuhan Huizhuohang Technology Co.,Ltd.,Wuhan 430070,China

Abstract:According to the current aerial image tower identification algorithm of UAV, it is common for UAV to obtain the original remote viewing image data of the tower through tilt photography technology, and identify the tower in the rest image data through machine learning training.Among them, there are some problems such as slow source of image data needed for machine training and two-dimensional identification of the tower in the picture.In this paper, an algorithm based on deep-object-pose is proposed for real-time aerial aerial aerial aerial recognition of the three-dimensional attitude of the tower.Firstly, image data is synthesized by three-dimensional platform.Secondly, deep-object-pose training and treatment were carried out.Then test the real picture data or real-time video, to achieve intelligent recognition of the tower's three-dimensional attitude information.The experimental results show that this algorithm will provide a new idea for uav to automatically find the target of tower and intelligent fine inspection.
Key word:
Deep-Object-Pose
3D attitude recognition of tower
UAV
aerial image

Research on underwater image quality improvement methods based on comparative experiments

DOI:10.16157/j.issn.0258-7998.200398

Author:Yu Yifei,Li Xuan,He Yushan,Xie Jincheng,Zhu Xiaowei,Yang Rubai

Author Affilications:School of Quality and Safety Engineering,China Jiliang University,Hangzhou 310018,China

Abstract:Under the influence of dispersive refraction and absorption of light caused by water medium, variation of illumination condition, and imaging distance, there are always some problems such as low contrast and serious blur devaluing the underwater image. Aiming at above problems, based on some researches which improving image quality, this paper chooses three different of underwater image datasets as targets and nine image quality improvement methods (which contains image enhancement and image restoration methods) to carry out the underwater comparative experiments, while analyzing the experimental results from six separate aspects such as time-consuming, peak signal to noise ratio, structural similarity measure, average gradient, entropy, and standard deviation. Experimental results shows that Histogram Equalization and Guided Filter performed the best according to the processed images, and achieved relatively satisfactory data results on the whole, which was believed to laid a basic foundation for further study.
Key word:
underwater image processing
image quality
histogram equalization
guided filter

Design of twice authentication and encryption intelligent recognition system based on RFID

DOI:10.16157/j.issn.0258-7998.200237

Author:Zang Junbin1,2,Bai Yang2

Author Affilications:1.Key Laboratory of Instrumentation Science & Dynamic Measurement,Ministry of Education North University of China, Taiyuan 030051,China; 2.North University of China,Shuozhou 036000,China

Abstract:According to the low cost and convenient application demand of current intelligent security system, a novel identification system is designed in order to improve the convenience and stability of RFID in practical application based on RFID secondary authentication and encryption.The system is primarily come out of the key storage partition of MIFARE-S50 and any data partition,used the irreversibility of hash code algorithm, and UID is used as the authentication part in the key of intelligent recognition system.Only when the data and UID are authenticated twice by the system, then the smart card can be recognized and made relevant identification actions. At the same time, if system encounter a copy card, it can effectively identify and prevent the authentication.The system supports three working modes that are the registration mode, operating mode and logout mode, which can effectively ensure the privacy and information security of users.Actual experimental results show that the system has high security,good stability,and is convenient and easy to operate. And it has high application and practical value,and can be used in schools,communities,companies and other medium-sized RFID intelligent security systems to limit the invasion of illegal personnel.
Key word:
RFID
MFRC522
authentication and encryption
intelligent recognition system

Embedded Technology

Design and implementation of a HPLC channel analysis module

DOI:10.16157/j.issn.0258-7998.201119

Author:Hao Weiqi,Wang Xianhui,Li Zheng,Xiao Deyong,Chen Kuixi

Author Affilications:Beijing Smart Chip Microelectronic Co.,Ltd.,Beijing 102200,China

Abstract:The noise environment of HPLC channel is complex, but the existing equipment is difficult to collect and analyze the channel noise. Therefore, this paper proposes a HPLC channel analysis module, which can realize the functions of high-precision sample collection, channel attenuation characteristic test, etc., and can play back the noise in the laboratory test environment to realize the real simulation of the field environment. Firstly, the hardware architecture of the analysis module is introduced, the state machine design of FPGA logic circuit and embedded software design are described . Finally, the prototype is tested. The results show that the channel analysis module can meet all the functions of the design requirements, and solve the problems of HPLC communication chip anti noise research and field maintenance test.
Key word:
HPLC
channel noise
high speed signal acquisition
FPGA

Low-latency FPGA design and implementation of convolutional coding and Viterbi decoding

DOI:10.16157/j.issn.0258-7998.201025

Author:Zhang Jian,Wu Qianwen,Gao Zefeng,Zhou Zhigang

Author Affilications:School of Electronic Information,Hangzhou Dianzi University,Hangzhou 310018,China

Abstract:Aiming at the high-speed and low-delay design requirements of millimeter wave communications, this paper designs low-delay decoding of convolutional codes with 1/2 code rate(2,1,7). A highly parallel optimization implementation framework and a low-latency minimum selection method are adopted to obtain the output of the Viterbi hard decision decoding algorithm. After synthesis using the Artix7-xc7a200t chip based on Xilinx, the data output delay of the decoder is about 89 clock cycles, and the highest operating frequency can reach 203.92 MHz. The results show that the decoder can support gigabit-level data transmission rates, and realizes a low-latency, high-rate codec.
Key word:
millimeter wave communication
convolutional code
Viterbi decoding
system generator

Circuits and Systems

Design of PIE coding based on FPGA and UVM verification platform

DOI:10.16157/j.issn.0258-7998.201022

Author:Li Shuxuan,Bu Gang

Author Affilications:School of Electronic Information Engineering,Nanjing University of Aeronautics and Astronautics,Nanjing 211106,China

Abstract:The international standard ISO/IEC18000-6 stipulates pulse interval encoding(PIE) as the encoding method of the reader transmission link in the RFID digital baseband system. It uses Verilog language to design the module, synthesizes with Quartus II software and downloads it to FPGA development board, then use SignalTap II logic analyzer to collect and analyzethe signal. In addition, the UART transceiver module is added on the basis of the design to realize the communication between PC and FPGA board. In order to fully verify the PIE code, based on UVM verification methodology and direct programminginterface C(DPI-C), an efficient and reusable verification platform was designed and implemented. The driver and the monitor were implemented to send excitation and the function of collecting output results. The output results of the reference model and DUT are consistent in the scoreboard, and the function coverage reaches 100%, which improves efficiency and completeness of the verification.
Key word:
PIE coding
UART
universal verification methodology
directed program interface

Design and analysis of multi-channel SAR digital converter

DOI:10.16157/j.issn.0258-7998.200979

Author:Li Jianxiang1,2,Yang Yuhua1,2,Liu Donghai1,2,Li Qiuyuan1,2

Author Affilications:1.Key Laboratory of Instrumentation Science and Dynamic Measurement of Ministry of Education,North University of China, Taiyuan 030051,China; 2.National Key Laboratory for Electronic Measurement Technology,North University of China,Taiyuan 030051,China

Abstract:In this paper, a high-reliability and high-precision analog-to-digital conversion scheme is proposed for the design of a multi-channel digital converter in a project. In order to complete the collection of 12 channels of sensor signal and the collection of 4 channels of voltage and current, the hardware circuit is analyzed and optimized in detail. The signal to be collected is processed by signal conditioning, analog switch, voltage division follow-up and anti-aliasing filtering, and the establishment time of the link is analyzed. Finally, the successive approximation AD chip is used for conversion. Verification of data collection accuracy through cooperation with the host computer.After a lot of experimental data verification, the collection accuracy can be better than 0.5%, meeting the task requirements.
Key word:
analog-to-digital conversion
high precision acquisition
signal conditioning
analog switch
anti-aliasing filtering

Radar and Navigation

Research on key technologies of sub-picosecond laser echo semi-physical simulation system

DOI:10.16157/j.issn.0258-7998.201212

Author:Zhu Min1,Wu Nan1,Yang Chunling1,Chen Haiyan2,Li Rui2

Author Affilications:1.School of Electrical Engineering and Automation,Harbin Institute of Technology,Harbin 150001,China; 2.China Air-borne Missile Academy,Luoyang 471009,China

Abstract:The laser echo simulation system can generate high-frequency and high-precision analog echo signals according to the simulated target. This paper presents a design scheme of a laser echo simulation system. The system uses FPGA to generate a delay signal, which can achieve a sub-picosecond delay accuracy for the echo signal. This paper optimizes the optical fiber communication protocol and uses FPGA to implement the echo signal transmission system, which has got rid of the dependence on the reflective memory card in the existing scheme, and has increased the data refresh frequency. The simulation results show that the data transmission speed of the simulation system designed in this paper reaches 1.6 Gb/s, the echo accuracy reaches 125 ps, and the distance resolution reaches 0.05 m. It laid the foundation for the development of high-precision laser guidance semi-physical simulation system based on laser array.
Key word:
laser imaging guidance
FPGA
optical fiber communication
high accuracy delay
PLL

Design and implementation of a demodulation method of G-bit variable coding modulation

DOI:10.16157/j.issn.0258-7998.201221

Author:Luo Qiang

Author Affilications:Southwest China Institute of Electronic Technology,Chengdu 610036,China

Abstract:With the development of satellite communication technology, the broadband spectrum is becoming less and less, so it is more and more important to improve the spectrum efficiency. The variable code modulation technology is a solution. According to the definition of modulation signal format in DVB-S2 standard, when the modulation mode is switched in QPSK, 8PSK, 16APSK and 32APSK, ?仔/2BPSK is still used for frame head and pilot. Based on this, a carrier synchronization and equalization processing based on pilot and frame header with variable coding rate is proposed. The results show that different modulation modes can be demodulated normally, while maintaining the same time. The test results show that the demodulation performance deviates from the theoretical value by less than 3 dB. Because only one carrier synchronization method and equalization method are used, which is simple and which saves the whole FPGA resource.
Key word:
pilot
variable code modulation
FPGA implementation
high-speed data receiver

A method and implementation of PTP timing accuracy measurement based on ZYNQ

DOI:10.16157/j.issn.0258-7998.201167

Author:Song Yan1,Ying Binjie1,Yang Chenggang1,Hao Zifei1,Mao Lizhen2

Author Affilications:1.Lishui Power Supply Company,State Grid Zhejiang Electric Power Co.,Ltd,Lishui 316021,China; 2.Hangzhou Quantum Sensing Technology Co.,Ltd.,Hangzhou 310019,China

Abstract:Aiming at the difficulties of PTP timing accuracy measurement, this paper puts forward using μCOS operating system and LWIP protocol stack on ZYNQ SOC to realize PTP timing accuracy measurement. Accurate system time and clock source difference are obtained by receiving GNSS signals, and the system time is synchronized to the nanosecond counter of ZYNQ by hardware. The ZYNQ EMAC interface is used to acquire the observation time of PTP frames, and the source difference is used to compensate the measurement time. Finally, an accurate time stamps are obtained, which can be used to measure the timing accuracy of the PTP master clock. The test results show that using this method to measure PTP clock, the measurement accuracy is better than 10 ns.
Key word:
PTP
timing
GNSS
time stamp

High Speed Wired Communication Chip

High Performance Computering

Information Flow and Energy Flow in Industrial Digital Transformation

Special Antenna and Radio Frequency Front End

Radar Target Tracking Technology

Key Technologies of 5G-A and 6G

Key Technologies of 5G and Its Evolution

Key Technologies of 5G and Its Evolution

Processing and Application of Marine Target Characteristic Data

Smart Power

Antenna Technology and Its Applications

5G-Advanced and 6G

Smart Agriculture

5G Vertical Industry Application

Microelectronics in Medical and Healthcare

Key Technologies for 6G

Application of Edge Computing in IIoT

Deep Learning and Image Recognization

6G Microwave Millimeter-wave Technology

Radar Processing Technology and Evaluation

Space-Ground Integrated Technology

Industrial Ethernet Network

5G Vertical Industry Application

Innovation and Application of PKS System

FPGA and Artificial Intelligence

5G Network Construction and Optimization

RF and Microwave

Edge Computing

Network and Business Requirements for 6G

5G and Intelligent Transportation

5G R16 Core Network Evolution Technology

Satellite Nevigation Technology

5G R16 Evolution Technology

5G Wireless Network Evolution Technology

5G Network Planning Technology

5G Indoor Coverage Technology

5G MEC and Its Applications

5G Co-construction and Sharing Technology

Expert Forum

5G and Emergency Communication

5G Slicing Technology and Its Applications

Industrial Internet

5G Terminal Key Realization Technology

5G and Artificial Intelligence

5G and Internet of Vehicles

Terahertz Technology and Its Application

Signal and Information Processing

Artificial Intelligence

5G Communication

Internet of Things and the Industrial Big Data

Electronic Techniques of UAV System

Power Electronic Technology

Medical Electronics

Aerospace Electronic Technology

Robot and Industrial Automation

ADAS Technique and Its Implementation

Heterogeneous Computing

2016 IEEE International Conference on Integrated Circuits and Microsystems

ARINC859 Bus Technology

FC Network Technology

Measurement and Control Technology of Bus Network

GJB288A Bus

Key Techniques of 5G and Algorthm Implement

IEEE-1394 Bus

Signal Conditioning Technology of Sensors

AFDX Network Technology

Discrete Signal Processing

Energy-Efficient Computing

Motor control

2012 Altera Electronic Design Article Contest