Abstract：Intelligent signage system is an important tool to realize the rapid development of intelligent transportation and intelligent city. Traditional road signs can only use fixed words, symbols and colors to unilaterally transmit information to traffic participants, which cannot effectively control traffic flow and meet people ' s travel needs. The emergence of intelligent signs makes up for these defects. Firstly, the current situation of traditional road signs is reviewed. In view of the impact of intelligent signs on people ' s travel and future urban road development, the shortcomings of traditional signs and the development needs of intelligent signs are analyzed from different perspectives of information perception, information communication and low power consumption. The key technologies in intelligent signs are expounded. Finally, the future development is prospected and summarized.

Abstract： Road traffic sign′s detection is one of the important links of intelligent transportation. A detection method based on the improved YOLOv3 model by the industry is proposed for the problems of complex background, small targets and slow detection speed in traffic sign detection.The method used a bidirectional feature pyramid structure to achieve bidirectional fusion of semantic information of low,middle and high level features of images to improve the classification of low-level prediction targets and the localization of high-level prediction targets. The main feature extraction network of the original model is improved, and the Darknet23 network is proposed to improve the extraction ability of the network and reduce the computational burden.According to the characteristics of the target shape, the K-means clustering algorithm for training the appropriate anchor frames and a more flexible L_(α-CIOU) loss function is introduced into the bounding box regression to make the network optimize towards a higher degree of overlap between the prediction boxes and the ground-truth boxes. The experimental results show that the method reaches 86.10% mAP@0.75 and 70.017% mAP@0.5:0.05:0.95 on the CCTSDB dataset, which are 10.17% and 5.656% higher than the original network, the number of parameters is reduced by 3 622 091 and the speed is improved 8.27 f/s ,which is better than mainstream detection networks such as SSD and Faster RCNN.

Abstract：In recent years, after the era of big data has entered human life, many unrecognizable text, semantic and other data have appeared in people's lives, which are very large in volume and intricate in semantics, which makes the classification task more difficult. How to make computers classify this information accurately has become an important task of current research. In this process, Chinese news text classification has become a branch in this field, which has a crucial role in the control of national public opinion, the understanding of users' daily behavior, and the prediction of users' future speech and behavior. In view of the shortage of news text classification models with large number of parameters and long training time, the BERT-CNN based knowledge distillation is proposed to compress the training time while maximizing the model performance and striving for a compromise between the two. According to the technical characteristics of model compression, BERT is used as the teacher model and CNN is used as the student model, and BERT is pre-trained first before allowing the student model to generalize the capability of the teacher model. The experimental results show that the model parametric number compression is about 1/82 and the time reduction is about 1/670 with the model performance loss of about 2.09%.

Abstract：The S-box based on LUT is widely used in the reconfigurable block cipher. It is not efficient in area for the expended resources. In this paper, the Hierarchy LUT architecture based on 4R/1W memory unit is proposed to compose the reconfigurable S-box. The 4R/1W can reduce the numbers of the storage unit in the reconfigurable S-box. The proposed Hierarchy LUT is applicable for different sets of ciphers and it is implemented under 40 nm CMOS technology to compare with similar work. The comparison result shows that the proposed Hierarchy LUT gains 6.88% to 51.76% resource efficiency improvement.

Abstract：EMIF is an external storage interface on a DSP (digital signal processor) device, and this paper proposes a bridge chip design method based on the EMIF interface of the TMS320VC5510 circuit. The bridge chip contains low-speed peripherals I2C, UART and SDIO interface, while integrating IDO, ADC analog IP. This design has been fully EDA simulation and FPGA verification, and tapeout for silicon verification. The implementation test results show that the EMIF interface can communicate with the bridge chip without error, and realize the peripheral expansion function of the TMS320VC5510 circuit. The design method of this bridge chip greatly increases the flexibility of SoC design on the market, effectively reduces the design cycle, and saves design costs.

Abstract：A novel low temperature coefficient voltage referece without resistors is presented in this brief, which is compatible with standard TSMC 0.18 µm CMOS technology. Threshold voltage (Vth) and proportional to absolute temperature voltage (VPTAT) form the basic linear temperature components. By weighting the sum of the two through asymmetric differential operational amplifier, the nonlinearity in the voltage reference is cancled and the precision of the output voltage is improved. The Vth is achieved by resistorless circuit and the VPTAT is achieved by asymmetric differential operational amplifier. The experimental results show that in the temperature range of -55 ℃ to 125 ℃, the voltage reference is 1.23 V with a temperature coefficient of 4.5 ppm/℃, and the power supply rejection ratio is lower than -93 dB while without filtering capacitor.

Abstract：Based on the principle of electron migration, eFuse realizes the programming operation by fusing the fuse to change its resistance characteristics irreversibly. High reliability is the core goal of eFuse system and circuit optimization design. This paper starts with the working principle and failure mode analysis of eFuse, and then focuses on the system causes and processes affecting its reliability. Based on the comprehensive conventional circuit design, combined with the factors affecting reliability in various working modes and specific modules, finally, a set of targeted circuit design solutions are proposed.

Abstract：With continuous evolution of semiconductor process technologies and IC (Integrated Chip) scales, more and more complex functions are integrated. Multi-core multi-thread CPU (Central Processing Unit), multi-dimension NoC (Network on Chip), high speed interfaces, kinds of peripherals and so on IP (Intellectual Property) are integrated into SoC (System on Chip). As a result, verification scenarios during IC development become extremely complicated, which leads to great challenges to the SoC development and corresponding verification completeness. Currently PSS (Portable Test Stimulus Standard) has been introduced along with the UVM (Universal Verification Methodology) for generating extensive randomized stimulus with more complicated scenarios.

Abstract：For the small and medium diameter mono ultrasonic flowmeter due to the small number of channels vulnerable to uneven flow field distribution, a dual-channel ultrasonic water flowmeter based on the time difference method is proposed. The hardware system of the flowmeter consists of STM32L431 low-power module, high-precision timing module TDC-GP22 and other components. According to the dual-channel pipe segment structure, the data fusion method based on Kalman filter algorithm is proposed to fuse the measurement data of the two channels and complete the filtering process, which improves the measurement accuracy of the flowmeter. The experimental test shows that the flowmeter measurement error is within 2.5%, and the Kalman fusion filtering algorithm can effectively improve the flowmeter measurement accuracy.

Abstract：The array eddy current detection of cylindrical metal specimen can be completed by several probes composed of array coils arranged around the specimen. The array eddy current probe is composed of exactly eight coils and completes the detection of metal specimen under a certain spatial structure. An array eddy current testing system based on Zynq-7020 is designed to excite one or more coils with the help of 8 analog switches of the excitation channel. With the help of an 1-in-8 analog switch, 8 array coils can be acquired in time. The signal is extracted by digital phase sensitive detection algorithm. The test results show that the system can save, transmit and process the excitation signal and induction signal of the array probe and complete the test task of measuring the sensitivity of the array probe.

Abstract：Taking lithium battery of new energy vehicles as the research object,an echo state network (ESN) model is established to predict the state of charge (SOC) of the vehicle's lithium battery. The cross-validation method is used to optimize the parameters of the ESN to solve difficulty to select arameters of the model. The echo state network is trained by recursive least squares method with forgetting factors to calculate the output weight matrix so as to improve the adaptability and accuracy of the network.The feasibility of the prediction algorithm is further analyzed and verified by the model simulation. The research further analyzes and compares the predicted SOC of the established ESN model, the BP neural network algorithm and radial basis function (RBF) network algorithm under UDDS, US06 and NYCC. The research results show that the established echo state network model is superior to the BP algorithm and RBF algorithm in estimating the performance and effect of lithium-ion battery SOC evaluation. Using ESN model to predict SOC has a good application prospect and can provide a reference for long-term and effective SOC prediction of the lithium battery.

Abstract：With the development of mobile communication technology, traditional intelligent terminal devices cannot meet the rapidly growing massive data computing requirements. Mobile edge computing provides low-latency and flexible computing solutions for mobile users in the Internet of Things. Considering the limited computing resources on the edge server and the dynamic needs of users in the network, this paper proposes to allocate the transmit power to optimize the transmission energy consumption through the binary particle swarm optimization algorithm. Analyzing request offloading and resource scheduling as a dual decision-making problem, a new multi-objective optimization algorithm based on particle swarm optimization algorithm is proposed to solve the problem. The simulation results show that the binary particle swarm optimization algorithm can save transmission energy and has good convergence. The proposed new algorithm outperforms existing algorithms in terms of response rate and can maintain good performance in dynamic edge computing networks.

Abstract：LEACH routing protocol is a classical clustering routing method in wireless sensor networks. However, in severely limited wireless networks, high power consumption and short lifetime of nodes seriously affect network performance. In this paper, an improved efficient LEACH-X protocol based on energy balance is proposed. By joining the optimal number of cluster head, the surplus energy correction factor is put forward. Considering the residual energy of nodes,the number of cluster head during the period and density factor, and partitioning the deployment area， the cluster head election threshold function is modified by adjusting the weight of the distance factor gain parameters for the region.Then, the second competition is in progress and ultimately the cluster head is selectd, so as to reduce the energy consumption of nodes, the survival time of WSN can be extended to some extent. Simulation results show that compared with the traditional LEACH protocol, the LEACH-X protocol reduces the network energy consumption and prolongs the network lifetime.

Abstract：In the manned space flight mission, the ground commanders and medical experts shall timely grasp the physiological conditions of astronauts in the cabin to ensure the safety of them. The heart rate and respiratory rate of astronauts are important physiological indexes to evaluate the health status of astronauts. How to calculate the heart rate and respiratory rate of astronauts quickly and accurately is one of the difficult problems faced by engineering tasks. Comprehensively considering the computing power under the condition of domestic autonomous controllable software and hardware, this paper presents a heart rate calculation R-wave detection algorithm based on self-learning threshold, and the zero-detection algorithm of respiratory rate calculation, and also designs a set of visual display software of heart rate and respiratory rate. It improves the real-time and accuracy of astronauts′ physiological data processing, and provides intuitive and reliable decision-making basis for the commanders and experts. The calculation and analysis of data shows that the algorithm has high accuracy and low computational requirements. It can meet the needs of medical support and medical supervision for astronauts in the waiting and ascending stages.

Abstract：As a key part of PCB design, the ordered escape routing problem is a special NP-hard problem, which has been studied extensively in recent years. In the traditional method, both ILP method and the heuristic algorithms based on ripping-up and rerouting are only applicable to small-scaled pin arrays with fewer pins, which easily lead to time violation. Aiming at the difficulty of large-scale global routing in traditional methods, the iteration-driven method is proposed to solve the global escaping routing problem by linear programming (LP), and to optimize area congestion by reducing capacity. Compared with the latest work, this algorithm can not only escape all pins but also achieve up to 50% times speed up and save 31% wire length.

Abstract：Domain name resolution service is the entrance for Internet access and traffic scheduling, therefore the performance of the Domain Name System (DNS) directly affects the user access experience. Based on the Promethus time series database, this paper designs and implements a distributed automatic test and monitoring system for response performance of domain name system. This system can only not test the multi-node distbuted DNS performance of the self-developed DNS system, but also monitor the operation in a time series mode for a long time，and monitor DNS service performance visually in real time.

Abstract：In the face of complex forms of network security, attackers often use a large number of information investigation, vulnerability utilization and confusion technologies to carry out malicious activities or destruction in the network. Although the current network security situational awareness platform finds and monitors the utilization process of new vulnerabilities as much as possible, the accuracy of attack prediction are not satisfactory. It is necessary to study more advanced algorithms based on the current prediction technology to automatically associate security events with the corresponding assets and attack types, carry out early warning and risk assessment for possible network security attacks to achieve accurate prediction of network security events.

Abstract：In order to prolong the service life of wireless vibration sensors when collecting a large number of high-frequency vibration data, this paper studied the existing vibration data compression algorithms, put forward and analyzed the existing problems, and on this basis, proposed an effective mechanism of K-means clustering-discrete cosine transform (DCT) dual data compression. According to the characteristics of predictive maintenance data, K-means clustering-DCT dual compression algorithm firstly used K-means algorithm to aggregate and classify vibration data, and then carried out DCT compression according to the frequency domain characteristics of vibration signals. The verification results showed that the algorithm significantly improved the data compression efficiency and reduced the transmission of redundant data by aggregating vibration data. In addition, under the condition of the same amount of data, the algorithm had better application performance after improving the peak signal-to-noise ratio compared with other algorithms.

Abstract：An improved ant colony algorithm is provided according to the disadvantage of slow convergence and easy to fall into local optimal solution of traditional ant colony algorithm in robot route planning. The raster method is used to build the path matrix, and a corner heuristic function is established to increase the probability of selecting a specified path and improve the search speed of the algorithm. Combining A* algorithm with improved ant colony algorithm, an improved distance heuristic is proposed to avoid falling into local optimal solution. A pheromone volatile factor which can be changed according to the number of iterations was proposed to enhance the global search ability. Based on the related data analysis, the improved ant colony algorithm is better than Ant Colony Algorithm with Multiple Inspired Factor(ACAM )algorithm in resolving problems such as slow convergence rate and preventing entering local optimal solution.

Abstract：ARINC429 bus is one of the aviation communication buses. It has the characteristics of high reliability and strong anti-interference ability, and is widely used in the aviation industry. This paper designs a multi-channel ARINC429 bus board with FPGA as the main control chip and bus interface chip. The purpose is to achieve automated testing and provide testing efficiency. This paper focuses on the design of FPGA, the application of interface chip and architecture design. Finally, the timing of the selected interface chip, the actual signal quality of ARINC429 bus and the overall function of the system are tested. The actual test shows that the board can communicate reliably at different rates and the data is stable.

Abstract：Individual tactical assessment is a comprehensive reflection of intelligence, skills and physical fitness. Currently, the training sites and equipment commonly used in tactical training vary widely, lacking necessary norms and standards. Based on image recognition and photoelectric detection technique was used to implement the intelligent design individual tactics training evaluation system, the system is mainly used for photoelectric sensor instead of traditional barbed wire to training more enter, leave, jump, sprint training. In order to judge whether the time for the trainer to pass through all the shelters and whether the movement essentials are standard, the signal of illegal touch in the training process is collected, processed and displayed in real time. Combined with the video image recognition technology, the tactical movements are compared to judge. Wireless transmission method is adopted to send the assessment results to the background management center for analysis and statistics, which is used to improve the timeliness, accuracy and fairness of the individual soldier assessment training.

Abstract：In board and chip interconnection, SRIO(Serail RapidIO) has higher bandwidth and reliability than other protocol. In this paper, the HELLO format of the MSG (message) interface is used to multi-interface design method at the sending end, and the Round-Robin processing mechanism is used internally to realize the competition processing of the multi-channel interface sharing one SRIO interface when sending data at the same time. It supports the arbitrary expansion of the number of interfaces and the clock domain. After testing and verification, the system can realize the data sending and receiving of 64 channels under different clocks at most, and the delay between the single channel and the packet can be as low as 4μs. It has good application value in the direction of SRIO transmission application.

Abstract： Aiming at the high confidentiality requirement of medical image data transmission in the Internet, an encryption method based on Logistic chaotic floating point number operation is proposed for medical image encryption. In this encryption method, PRNG based on Logistic chaos was designed with double-precision floating-point operations and described by the Verilog . The comprehensive design of encryption method is realized on the development platform of Cyclone IV series DE2-115 of Altera Corporation. The security of encryption algorithm is analyzed from the cryptographic perspectives such as key sensitivity test, histogram analysis, correlation test, information entropy processing, etc. By comparing with some existing image encryption algorithms, it is found that the image encrypted by this encryption algorithm has the characteristics of being sensitive to keys, small correlation coefficient and high information entropy. In addition, the FPGA-based hardware encryption system has high encryption stability and good real-time performance.

Abstract：During the measurement of s-parameters, using the de-embedding method to remove the influence of fixture is important. The proposed method decomposes the s-parameter of fixture by time domains. Then the ABCD matric is used to remove the decomposed fixture and get the s-parameter of device under test. By designing printed circuit board to do some experiments, and compare the proposed method with the other two traditional methods, AFR and Delta L. The results prove that this method is valid and accurate under high-frequency signal. Due to the facture that the algorithm decomposes first and then de-embeds, it can be applied to the situation that the left and right fixture are different.

Abstract：In nuclear and particle physics experiments, due to the influence of the experimental background and detector noise, the experiment needs to pick out valid physical events by the trigger selection, and eliminate the background noise. Aiming at the trigger selection requirements based on hit multiplicity (NHit) in the cases of high event rates in physical experiments, this paper designs a high-performance digital trigger circuit. This circuit has 13 high-speed serial communication interfaces, which support optical fiber data transmission and Gigabit network communication; onboard 32 Gbit DDR4 cache and high-end FPGA to support large-capacity high-speed storage and real-time data processing. Based on this circuit, the real-time hardware NHit trigger algorithm could be run, which could realize fast trigger selection and data readout for the front-end data. At the same time, the circuit is easy to expand and could be flexibly used in different physical experiments. After testing and verification, the transmission rate of one single optical fiber interface could reach 8.125 Gb/s, the uplink transmission rate of SiTCP could reach 949.3 Mb/s, and the actual read and write rates of the DDR4 cache could reach 102.6 Gb/s, which meet the data transmission and caching requirements of digital trigger circuit design.