Abstract：Blockchain and quantum information technology are the most cutting-edge science and technology emerging in recent years, which have received extensive attention and research in the industry. Among them, blockchain has decentralized characteristics, and applications with blockchain as the core technology have emerged in many fields such as fintech, Internet of Things, livelihood, and politics. Quantum information technology is divided into quantum computing, quantum communication, and quantum measurement. Quantum computing is mainly studied for its computational superiority compared with classical computing, and the operation speed of quantum computing has been proved to be far superior to classical computing in solving certain complex problems. While both are growing rapidly, there are issues that need to be addressed urgently. The security of blockchains is threatened because some of the classical cryptographic techniques used in blockchains have been shown to be broken by quantum computing, such as digital signatures based on asymmetric cryptographic mechanisms. To solve this problem, it has been shown that applying quantum information technology to blockchain can protect it from quantum attacks.

Abstract：With the continuous emergence of emerging applications, more and more businesses require reliable transmission with low latency and low jitter. Especially in industrial scenarios, the number of access network devices has surged, and the network is developing towards large-scale and complex directions. How to ensure the deterministic delivery of key data streams has become a research focus. Deterministic network technology has received widespread attention due to its characteristics such as low latency, low jitter, low packet loss rate, deterministic bandwidth, and highly reliable transmission, and has good application prospects in fields such as automotive, energy, and industrial automation. The key technologies of deterministic networks are elaborated, the deterministic network fusion deployment solutions in two different scenarios are introduced, and finally the challenges faced by deterministic network technologies in practical application are analyzed.

Abstract：In this paper, a Bézier curve-based trajectory planning method with obstacle avoidance for intelligent vehicles, namely path planning and speed planning, is studied. In path planning, in order to adapt to roads of various shapes, the Cartesian coordinates of roads are converted to Frénet coordinates. Taking path length, curvature, continuity and vehicle collision risk as the cost function, the dangerous potential field theory is introduced to describe the risk of vehicle collision, and the sequential quadratic programming method is adopted to solve this nonlinear optimization problem. In speed planning, aiming at driving efficiency and comfort, speed planning is realized, which can meet different driving needs by adjusting the weight of each sub-objective function.

Abstract：Chinese named entity recognition has been involved with two tasks, including Chinese flat named entity recognition and Chinese nested named entity recognition. Chinese nested named entity recognition is more difficult. Therefore, this paper proposes a unified model, namely TLEXNER, based on lexicon enhancement and table filling, which can tackle the above two tasks concurrently. Aiming at the difficulty of Chinese word segmentation, the lexicon adapter is used to integrate the lexicon information into the BERT pre-training model，and integrates the relative position information of characters and lexical groups into the BERT embedding layer. Then conditional layer normalization and biaffine model is used to build and predict the representation of the character-pair table, and the relationship between character pairs is modeled by table structure to obtain the unified representation of flat entities and nested entities.

Abstract：This paper combines high-precision modeling and graph theory ideas to establish a novel reliability analysis method, which provides a strong guarantee for product design and testing, for analyzing the potential risk of breakdown and creepage inside the high-voltage isolated system-in-package products. Firstly, the 3D model of the product is converted into a point cloud model, and a computable numerical model is formed through filtering and surface reconstruction. Then, according to the geometric characteristics and physical relations, the surface creepage problem and breakdown problem are equivalent to the calculation of geodesic path and Euclidean path, respectively. According to the layout, the Dijkstra algorithm is optimized to calculate the breakdown and creepage paths after packaging. Finally, the product risk level is judged by reference to the experimental standards.

Abstract：To enhance the defense capability of automotive system information security, a secure encryption circuit is designed for secure hardware extensions specification. This circuit is designed with an algorithm module for the AES, a finite state machine for executing SHE instructions, and a storage control interface for both instructions and keys. Simulation results show that the secure encryption circuit has strict access control, supports hardware key management, protects keys from software attacks, and has operation isolation protection measures, improving system security and confidentiality.

Abstract：The system is designed to realize the automatic acquisition and analysis of radar digital receivers. The digital IQ data is collected and stored by using the JTAG interface of the circuit and the SignalTap function of Quartus software. After the packaging of embedded MATLAB and the general analysis of the LabVIEW test algorithm, the testing of multi-channel digital receiver specifications and performance is more convenient, and the system can significantly improve the automatic testing efficiency.

Abstract：The flange plate and blade root hub of wind turbines are connected by high-strength bolts, and the collapse of most wind turbine towers is caused by the fatigue of the connecting bolts. In order to reduce the occurrence of such tower collapse accidents, a new method for analyzing and predicting bolt fatigue damage is proposed. For high-strength connecting bolts of 2.0 MW wind turbine generators, ultrasonic probes and temperature sensors are used to collect bolt data and obtain random stress spectra of the bolts. Then the stress spectrum is modified based on the rain flow counting method and Goodman formula, and the stress cycle data are extracted. Finally, based on the S-N curve of bolt material and Miner's linear cumulative damage theory, a bolt fatigue prediction model is constructed. The experimental results show that the estimated bolt fatigue damage is far less than the bolt fatigue limit, which meets the design life requirements of the wind turbine.

Abstract：Workpiece waste is usually caused by delayed detection of surface roughness. A rapid surface roughness detection classification based on the current signal of the spindle motor is proposed for the first time. The current signals of the spindle motor under different surface roughness processing conditions are collected through experiments, and the current signals are decomposed into different frequency bands through wavelet packet decomposition. The current signals of different frequency bands are evaluated by the energy characteristics and the margin factors, and the low correlation frequency bands are filtered. Then the features are screened through random forest to reduce the redundancy of features. The total harmonic distortion feature achieves built-up edge detection during the machining process. The workpiece surface roughness detection accuracy is as high as 95%. And the detection time is within 2 seconds. Spindle current signal analysis basically achieves fast and accurate detection of workpiece surface roughness.

Abstract：The static parameters of analog to digital converter (ADC) include differential nonlinearity (DNL) and integral nonlinearity (INL). The main method to measure static parameters is the code density histogram method.The traditional code density histogram method has high requirements on the calculation accuracy of input sinusoidal amplitude. This paper proposes a normalized processing platform scheme based on code density histogram. According to the test requirements, the test excitation amplitude that meets the requirements is selected to verify the effectiveness of the normalized scheme.The experimental results show that normalization reduces the influence of sinusoidal amplitude change on the code density histogram method and improves the stability of the code density histogram method.

Abstract：The high overload impact test is costly and time consuming, and the failure detection means are few, so it is difficult to locate the weak points of the structure. In this paper the impact response spectrum and transient dynamics method are used to study the impact load response of a RF microsystem based on bulk silicon micro-electromechanical system(MEMS) at plate level and under experimental conditions. The simulation results show that the RF microsystem can bear a high impact load，which can predict the structural failure point so as to improve the impact reliability of product.

Abstract：Evaluating the similarity of rocket time series data is one of the main tasks in rocket time series data analysis. Dynamic time warping (DTW) is the most representative similarity measurement algorithm, but due to its susceptibility to pathological alignment, time points are often mistakenly matched, making it difficult to meet the accuracy requirements in the rocket field. To address this issue, this paper proposes a similarity evaluation algorithm for time series data based on radian features. By fully considering the original temporal features and radian features, and using time neighborhood information for calculation, the algorithm's ability to capture the local shape of the sequence has been greatly improved. The proposed algorithm was applied to time series classification task and achieved a classification accuracy improvement of over 26.04% on nine datasets with similar features of rocket data,which proved its effectiveness.

Abstract： Existing anomaly detectors in AMIs suffer from shallow architectures, which impede their ability to capture temporal correlations and complex patterns in electricity consumption data, thus impact detection performance adversely. A deep (stacked) autoencoder structure based on Long Short-Term Memory (LSTM) with a sequence-to-sequence (seq2seq) configuration is proposed. The depth of the autoencoder architecture is beneficial for capturing complex data patterns, and the seq2seq LSTM model effectively utilizes the temporal sequential characteristics of the data. The performance of simple autoencoders, variational autoencoders, and Attention Enhanced Autoencoders (AEA) was studied, revealing that using the seq2seq structure in these three types of autoencoders results in superior detection performance compared to fully connected architectures. Simulation results demonstrate that the detector with an attention mechanism (AEA) achieves a 4%~21% higher detection rate and a 4%~13% lower false alarm rate compared to the best-performing existing detectors.

Abstract：In order to meet the power combination requirements of 3 mm band， a novel 8 in 1 high power amplifier， which works at watt level for W band use， is proposed. It achieves module airtightness by utilizing silicon based chips， which is an innovative way for W-band waveguides. The conbiner design is based on the waveguides and the electromagnetic analysis is conducted for the inner structures. High frequency simulating softwares are also used to simulate the power combiner. By comparing the tested results and simulated indicators， this W-band power amplifier based on airtight waveguides can meet all the design requirements.

Abstract：A miniaturized omnidirectional microstrip filter antenna is designed. The antenna is composed of a bandpass filter and a microstrip antenna, which share a ground plane to reduce the size and are connected by gap coupling. The bandpass filter is etched at the feeder position of the microstrip patch antenna, and the frequency selection filter function is introduced. A transverse rectangular patch is added at the front end of the input feeder to achieve good impedance matching of the whole system. Compared with the traditional microstrip antenna, the designed filter antenna introduces the frequency selection filter function without changing the size, and shows high selectivity at the edge of the passband. The simulation and test results show that the impedance bandwidth of the filter antenna is 2.31 GHz~2.56 GHz, and the gain in the passband is flat, the average gain is about 2.1 dBi, and the filter antenna has omnidirectional radiation characteristics in the working frequency band.

Abstract：This paper designs an antenna layout for tethered multi rotor UAV communication system，conducts EMC simulation analysis between antennas using FEKO software, and conducts actual installation and flight test. Simulation and actual measurement indicate that the antenna layout method is suitable for multi rotor UAV communication system.

Abstract：A　high speed anolog to digital converter (ADC) evaluation system based on field programmable logic array (FPGA) is designed and implemented. The logic codes are designed based on the FPGA, and the signal sampling and data transmission of ADC are controlled according to different test modes. The analog input signal is converted into digital data stored in the FPGA block RAMs, and transmitted through the user datagram protocol (UDP) to the upper computer designed in MATLAB, which processes the calculated data and output the test results to user. The parameters of a 16-bit ADC with a sampling rate of 100 MS/s are calculated and analyzed in the system. Experimental results show that this system can achieve high speed and high precision ADCs testing and evaluation.

Abstract：In order to accurately locate and position the wheeled mobile robot and realize its stable motion control, a low-cost inertial multi-redundant navigation and control integrated machine is designed, and specific software and hardware design methods are given. The switching power supply MP2482DN and linear power supply JW29300U-3.3V of the voltage stabilizing circuit provide a stable 5 V and 3.3 V higher power power for the integrated machine; the SPI of the controller STM32H7 uses a star topology bus to communicate with three six-axis inertial chips BMI088, and two TTL serial ports communicate with the differential satellite positioning board in two directions to realize the differential positioning and attitude determination of the robot; the CAN bus interface of the controller STM32F4 communicates with the robot chassis two-way to realize motion control, and one TTL serial port realizes two-way communication with the controller STM32H7

Abstract：In order to meet the requirements of testing the long-term read and write performance of eMMC storage particles, an eMMC life verification design method is studied based on FPGA. Combined with eMMC working principle and high speed DDR（double rate）bus mode, the core components of verification system are designed in detail. FPGA（xc7a50tffgg484-1）is adopted as main control chip and four pieces of eMMC（FEMDRW064G-88A19）are selected as verification objects. The initial configuration method of eMMC is analyzed, and the module of open read and write is designed. With the control commands of the eMMC monitoring software, 180 000 times of loop read and write based on the blocks is completed. All the test results are passed, and the average read/write speed can reach 31 MB/s.

Abstract： Phase-locked loop (PLL) is a negative feedback control system that can achieve phase synchronization of two signals. Its filtering effect can make its passband narrow, and its output frequency automatically track the input frequency. Phase locked loops are often used in atomic clocks, frequency standard taming systems, and time synchronization systems. PLL is an important component of communication, satellite navigation, and electrical measurement systems. Phase noise and acquisition time are two mutually constraining indicators in a PLL. Reducing the frequency acquisition time of a PLL while suppressing phase noise is one of the important issues in current research on phase-lock techniques. To solve this problem, this paper designs an auxiliary acquisition circuit based on the basic theory and composition of analog PLL and the mathematical relationship between loop bandwidth and acquisition time.

Abstract： With the increase in usage years, road surface damage such as unevenness occurs, and fast and effective road roughness detection equipment is urgently needed to detect the road. In this paper, we design a multi-sensor data synchronization acquisition system for road roughness detection, with FPGA as the control core, using NEMA data output from GPS and high stability crystal to establish a high-precision time reference, and using A/D sampling to synchronize data acquisition of 4 sensors. To improve the anti-interference capability and data sampling accuracy of the system, the sensor signal conditioning circuit is designed with differential amplification and anti-alias filtering. The experimental results show that the system completes the multi-sensor data synchronization acquisition with high precision, the time synchronization accuracy is microsecond level, can provide high precision raw data for evaluating the road roughness, has the advantages of high data sampling accuracy, good stability, strong anti-interference ability, low cost, etc., and has been successfully applied to the road detection vehicle of Wuhan XROE Co., ltd.

Abstract：In demand of 4K or higher resolution video transporting in cockpit in the future, a common system related to ARINC818 video codec is referred and verified through DP video port in this article. The system receives DP video from the computer source,decoded in FPGA, and then packaged the video data according to ARINC818 protocol. The produced ARINC818 video is sent back to the system, decoded in FPGA, and transferred to DP video to display. 10 Gb/s data rate in ARINC818-3 standard is applied in this system, single lane 4K@30 Hz ARINC818 video receiving and dispatching is implemented ,as well as dual lane 4K@60 Hz, characterized with easy to use, feature-rich and flexible configuration.